messages from 2021-05-14 08:50:04 to 2021-06-16 00:24:56 UTC [more...]
[PATCH v2 0/2] CXL ACPI tables for object creation
2021-06-16 0:20 UTC (3+ messages)
` [PATCH v2 1/2] cxl/acpi: Add the Host Bridge base address to CXL port objects
` [PATCH v2 2/2] cxl/acpi: Use the ACPI CFMWS to create static decoder objects
[PATCH 0/2] CXL ACPI tables for object creation
2021-06-16 0:01 UTC (7+ messages)
` [PATCH 1/2] cxl/acpi: Add the Host Bridge base address to CXL port objects
` [PATCH 2/2] cxl/acpi: Use the ACPI CFMWS to create static decoder objects
[PATCH v2 0/5] cxl/pmem: Add core infrastructure for PMEM support
2021-06-15 23:36 UTC (8+ messages)
` [PATCH v2 1/5] cxl/core: Add cxl-bus driver infrastructure
` [PATCH v2 2/5] cxl/pmem: Add initial infrastructure for pmem support
` [PATCH v2 3/5] libnvdimm: Export nvdimm shutdown helper, nvdimm_delete()
` [PATCH v2 4/5] libnvdimm: Drop unused device power management support
` [PATCH v2 5/5] cxl/pmem: Register 'pmem' / cxl_nvdimm devices
` [PATCH v3 "
[RFC PATCH 0/4] Region Creation
2021-06-14 22:21 UTC (21+ messages)
` [RFC PATCH 1/4] cxl/region: Add region creation ABI
` [RFC PATCH 2/4] cxl/region: Create attribute structure / verify
` [RFC PATCH 3/4] cxl: Move cxl_memdev conversion helper to mem.h
` [RFC PATCH 4/4] cxl/region: Introduce concept of region configuration
[PATCH 0/5] cxl/pmem: Add core infrastructure for PMEM support
2021-06-14 21:40 UTC (18+ messages)
` [PATCH 1/5] cxl/core: Add cxl-bus driver infrastructure
` [PATCH 2/5] cxl/pmem: Add initial infrastructure for pmem support
` [PATCH 3/5] libnvdimm: Export nvdimm shutdown helper, nvdimm_delete()
` [PATCH 4/5] libnvdimm: Drop unused device power management support
` [PATCH 5/5] cxl/pmem: Register 'pmem' / cxl_nvdimm devices
CXL Vendor Specific Capabilities
2021-06-12 2:25 UTC (4+ messages)
[PATCH 0/3] Query and use Partition Info
2021-06-11 20:09 UTC (15+ messages)
` [PATCH 1/3] cxl/pci: Store memory capacity values
` [PATCH 2/3] cxl/mem: Report correct ram/pmem size in sysfs
` [PATCH 3/3] cxl/mem: Add partition information to sysfs
[PATCH] cxl/hdm: Fix decoder count calculation
2021-06-11 19:08 UTC (5+ messages)
` [PATCH v2] "
[PATCH] cxl/component_regs: Fix offset
2021-06-11 13:03 UTC (2+ messages)
[PATCH v4 0/5] PCI Data Object Exchange support + CXL CDAT
2021-06-10 21:46 UTC (13+ messages)
` [PATCH v4 1/5] PCI: Add vendor ID for the PCI SIG
` [PATCH v4 2/5] PCI/DOE: Add Data Object Exchange support
` [PATCH v4 3/5] cxl/mem: Add CDAT table reading from DOE
` [PATCH v4 4/5] DONOTMERGE: PCI/DOE: Add per DOE chrdev for ioctl based access
` [PATCH v4 5/5] DONOTMERGE: PCI/DOE: Add userspace example program to tools/pci
[PATCH v6 0/5] CXL port and decoder enumeration
2021-06-10 11:27 UTC (9+ messages)
` [PATCH v6 1/5] cxl/acpi: Introduce the root of a cxl_port topology
` [PATCH v6 2/5] cxl/Kconfig: Default drivers to CONFIG_CXL_BUS
` [PATCH v6 3/5] cxl/acpi: Add downstream port data to cxl_port instances
` [PATCH v6 4/5] cxl/acpi: Enumerate host bridge root ports
` [PATCH v6 5/5] cxl/acpi: Introduce cxl_decoder objects
` [PATCH v7 "
[PATCH v5 0/6] CXL port and decoder enumeration
2021-06-09 15:15 UTC (22+ messages)
` [PATCH v5 1/6] cxl/acpi: Local definition of ACPICA infrastructure
` [PATCH v5 2/6] cxl/acpi: Introduce cxl_root, the root of a cxl_port topology
` [PATCH v5 3/6] cxl/Kconfig: Default drivers to CONFIG_CXL_BUS
` [PATCH v5 4/6] cxl/acpi: Add downstream port data to cxl_port instances
` [PATCH v5 5/6] cxl/acpi: Enumerate host bridge root ports
` [PATCH v5 6/6] cxl/acpi: Introduce cxl_decoder objects
Proposal
2021-06-09 12:10 UTC
[PATCH V3 0/5] Map register blocks individually
2021-06-06 0:30 UTC (9+ messages)
` [PATCH V3 1/5] cxl/mem: Introduce cxl_decode_register_block()
` [PATCH V3 2/5] cxl/mem: Reserve all device regions at once
` [PATCH V3 3/5] cxl/mem: Map registers based on capabilities
` [PATCH V3.1] "
` [PATCH V3 4/5] cxl/mem: Reserve individual register block regions
` [PATCH V3.1] "
` [PATCH V3 5/5] cxl/pci: Add HDM decoder capabilities
[RFC PATCH] Documentation/arm64: describe the kernel's expectations of 'memory'
2021-06-04 17:57 UTC (5+ messages)
[PATCH] cxl/pci: Fixup devm_cxl_iomap_block() to take a 'struct device *'
2021-06-02 22:23 UTC (3+ messages)
[PATCH v2 0/5] Map register blocks individually
2021-05-27 17:53 UTC (12+ messages)
` [PATCH v2 1/5] cxl/mem: Introduce cxl_decode_register_block()
` [PATCH v2 2/5] cxl/mem: Reserve all device regions at once
` [PATCH v2 3/5] cxl/mem: Map registers based on capabilities
` [PATCH v2 4/5] cxl/mem: Reserve individual register block regions
` [PATCH v2 5/5] cxl: Add HDM decoder capbilities
[PATCH] cxl: Rename mem to pci
2021-05-26 18:01 UTC (5+ messages)
` [PATCH v2] "
` [PATCH v3] "
[PATCH 4/7] cxl/mem: Get rid of @cxlm.base
2021-05-20 21:29 UTC (2+ messages)
` [PATCH v2 "
[PATCH] cxl/mem: Demarcate vendor specific capability IDs
2021-05-20 20:55 UTC (2+ messages)
[PATCH] cxl/docs: Fix "Title underline too short" warning
2021-05-20 19:54 UTC (2+ messages)
[PATCH] cxl/pci.c: Add a 'label_storage_size' attribute to the memdev
2021-05-20 19:50 UTC (2+ messages)
[PATCH 0/4] Map register blocks individually
2021-05-20 19:44 UTC (8+ messages)
` [PATCH 1/4] cxl/mem: Fully decode device capability header
` [PATCH 2/4] cxl/mem: Reserve all device regions at once
[RFC PATCH v3 0/4] PCI Data Object Exchange support + CXL CDAT
2021-05-20 8:22 UTC (25+ messages)
` [RFC PATCH v3 2/4] PCI/doe: Add Data Object Exchange support
[PATCH 3/3] cxl/mem: Demarcate vendor specific capability IDs
2021-05-19 20:01 UTC (3+ messages)
Access to CXL memory
2021-05-18 1:57 UTC (2+ messages)
[PATCH v4 7/8] cxl/port: Introduce cxl_port objects
2021-05-14 22:54 UTC (2+ messages)
` [PATCH v5 "
[PATCH v4 0/8] CXL Port Enumeration and Plans for v5.14
2021-05-14 21:37 UTC (5+ messages)
` [PATCH v4 5/8] cxl/acpi: Introduce ACPI0017 driver and cxl_root
` [PATCH v5 "
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