linux-cxl.vger.kernel.org archive mirror

 messages from 2022-01-24 00:28:50 to 2022-01-28 00:29:16 UTC [more...]

[PATCH v3 00/14] CXL Region driver
 2022-01-28  0:27 UTC  (11+ messages)
` [PATCH v3 01/14] cxl/region: Add region creation ABI
` [PATCH v3 02/14] cxl/region: Introduce concept of region configuration
` [PATCH v3 03/14] cxl/mem: Cache port created by the mem dev
` [PATCH v3 04/14] cxl/region: Introduce a cxl_region driver
` [PATCH v3 05/14] cxl/acpi: Handle address space allocation
` [PATCH v3 06/14] cxl/region: Address "
` [PATCH v3 08/14] cxl/region: HB port config verification
` [PATCH v3 09/14] cxl/region: Add infrastructure for decoder programming
` [PATCH v3 11/14] cxl/region: Add support for single switch level
` [PATCH v3 12/14] cxl: Program decoders for regions

Treating CXL Type 3 device as a block device
 2022-01-27 23:39 UTC 

[PATCH 0/4] Unify meaning of interleave attributes
 2022-01-27 23:01 UTC  (8+ messages)
` [PATCH 1/4] cxl/acpi: Store interleave granularity absolutely
` [PATCH 2/4] cxl/core: Add more decoder attributes to sysfs
` [PATCH 3/4] cxl/core: Extract IW/IG decoding
` [PATCH 4/4] cxl/acpi: Use common "

[ndctl PATCH v3 0/6] Add partitioning support for CXL memdevs
 2022-01-27 20:50 UTC  (19+ messages)
` [ndctl PATCH v3 1/6] libcxl: add GET_PARTITION_INFO mailbox command and accessors
` [ndctl PATCH v3 2/6] libcxl: add accessors for capacity fields of the IDENTIFY command
` [ndctl PATCH v3 3/6] libcxl: return the partition alignment field in bytes
` [ndctl PATCH v3 4/6] cxl: add memdev partition information to cxl-list
` [ndctl PATCH v3 5/6] libcxl: add interfaces for SET_PARTITION_INFO mailbox command
` [ndctl PATCH v3 6/6] cxl: add command set-partition-info

[PATCH v4 00/42] CXl 2.0 emulation Support
 2022-01-27 16:42 UTC  (76+ messages)
` [PATCH v4 01/42] hw/pci/cxl: Add a CXL component type (interface)
` [PATCH v4 02/42] hw/cxl/component: Introduce CXL components (8.1.x, 8.2.5)
` [PATCH v4 03/42] MAINTAINERS: Add entry for Compute Express Link Emulation
` [PATCH v4 04/42] hw/cxl/device: Introduce a CXL device (8.2.8)
` [PATCH v4 05/42] hw/cxl/device: Implement the CAP array (8.2.8.1-2)
` [PATCH v4 06/42] hw/cxl/device: Implement basic mailbox (8.2.8.4)
` [PATCH v4 07/42] hw/cxl/device: Add memory device utilities
` [PATCH v4 08/42] hw/cxl/device: Add cheap EVENTS implementation (8.2.9.1)
` [PATCH v4 09/42] hw/cxl/device: Timestamp implementation (8.2.9.3)
` [PATCH v4 10/42] hw/cxl/device: Add log commands (8.2.9.4) + CEL
` [PATCH v4 11/42] hw/pxb: Use a type for realizing expanders
` [PATCH v4 12/42] hw/pci/cxl: Create a CXL bus type
` [PATCH v4 13/42] hw/pxb: Allow creation of a CXL PXB (host bridge)
` [PATCH v4 14/42] tests/acpi: allow DSDT.viot table changes
` [PATCH v4 15/42] acpi/pci: Consolidate host bridge setup
` [PATCH v4 16/42] tests/acpi: Add update DSDT.viot
` [PATCH v4 17/42] cxl: Machine level control on whether CXL support is enabled
` [PATCH v4 18/42] hw/cxl/component: Implement host bridge MMIO (8.2.5, table 142)
` [PATCH v4 19/42] hw/cxl/rp: Add a root port
` [PATCH v4 20/42] hw/cxl/device: Add a memory device (8.2.8.5)
` [PATCH v4 21/42] hw/cxl/device: Implement MMIO HDM decoding (8.2.5.12)
` [PATCH v4 22/42] acpi/cxl: Add _OSC implementation (9.14.2)
` [PATCH v4 23/42] tests/acpi: allow CEDT table addition
` [PATCH v4 24/42] acpi/cxl: Create the CEDT (9.14.1)
` [PATCH v4 25/42] hw/cxl/device: Add some trivial commands
` [PATCH v4 26/42] hw/cxl/device: Plumb real Label Storage Area (LSA) sizing
` [PATCH v4 27/42] hw/cxl/device: Implement get/set Label Storage Area (LSA)
` [PATCH v4 28/42] hw/cxl/component: Add utils for interleave parameter encoding/decoding
` [PATCH v4 29/42] hw/cxl/host: Add support for CXL Fixed Memory Windows
` [PATCH v4 30/42] acpi/cxl: Introduce CFMWS structures in CEDT
` [PATCH v4 31/42] hw/pci-host/gpex-acpi: Add support for dsdt construction for pxb-cxl
` [PATCH v4 32/42] pci/pcie_port: Add pci_find_port_by_pn()
` [PATCH v4 33/42] CXL/cxl_component: Add cxl_get_hb_cstate()
` [PATCH v4 34/42] mem/cxl_type3: Add read and write functions for associated hostmem
` [PATCH v4 35/42] cxl/cxl-host: Add memops for CFMWS region
` [PATCH v4 36/42] arm/virt: Allow virt/CEDT creation
` [PATCH v4 37/42] hw/arm/virt: Basic CXL enablement on pci_expander_bridge instances pxb-cxl
` [PATCH v4 38/42] RFC: softmmu/memory: Add ops to memory_region_ram_init_from_file
` [PATCH v4 39/42] hw/cxl/component Add a dumb HDM decoder handler
` [PATCH v4 40/42] i386/pc: Enable CXL fixed memory windows
` [PATCH v4 41/42] qtest/acpi: Add reference CEDT tables
` [PATCH v4 42/42] qtest/cxl: Add very basic sanity tests

Should bios always mark CXL DRAM as EFI_MEMORY_SP?
 2022-01-27 16:18 UTC 

Patch: Make ACPI subsystem provide CEDT table
 2022-01-27 10:15 UTC  (5+ messages)

[PATCH v3 00/40] CXL.mem Topology Discovery and Hotplug Support
 2022-01-26 23:59 UTC  (46+ messages)
` [PATCH v3 02/40] cxl/pci: Implement Interface Ready Timeout
` [PATCH v3 03/40] cxl/pci: Defer mailbox status checks to command timeouts
` [PATCH v3 04/40] cxl: Flesh out register names
` [PATCH v3 05/40] cxl/pci: Add new DVSEC definitions
` [PATCH v3 06/40] cxl/acpi: Map component registers for Root Ports
` [PATCH v3 07/40] cxl: Introduce module_cxl_driver
` [PATCH v3 08/40] cxl/core/port: Rename bus.c to port.c
` [PATCH v3 09/40] cxl/decoder: Hide physical address information from non-root
` [PATCH v3 10/40] cxl/core: Convert decoder range to resource
` [PATCH v3 11/40] cxl/core/port: Clarify decoder creation
` [PATCH v3 12/40] cxl/core: Fix cxl_probe_component_regs() error message
` [PATCH v3 13/40] cxl/core/port: Make passthrough decoder init implicit
` [PATCH v3 14/40] cxl/core: Track port depth
` [PATCH v3 15/40] cxl: Prove CXL locking
` [PATCH v3 16/40] cxl/core/port: Use dedicated lock for decoder target list
  ` [PATCH v4 "
` [PATCH v3 17/40] cxl/port: Introduce cxl_port_to_pci_bus()
` [PATCH v3 18/40] cxl/pmem: Introduce a find_cxl_root() helper
  ` [PATCH v4 "
    ` [PATCH v5 "
` [PATCH v3 19/40] cxl/port: Up-level cxl_add_dport() locking requirements to the caller
` [PATCH v3 20/40] cxl/pci: Rename pci.h to cxlpci.h
` [PATCH v3 21/40] cxl/core: Generalize dport enumeration in the core
` [PATCH v3 22/40] cxl/core/hdm: Add CXL standard decoder enumeration to "
  ` [PATCH v4 "
` [PATCH v3 23/40] cxl/core: Emit modalias for CXL devices
` [PATCH v3 24/40] cxl/port: Add a driver for 'struct cxl_port' objects
  ` [PATCH v4 "
` [PATCH v3 25/40] cxl/core/port: Remove @host argument for dport + decoder enumeration
` [PATCH v3 26/40] cxl/pci: Store component register base in cxlds
` [PATCH v3 27/40] cxl/pci: Cache device DVSEC offset
` [PATCH v3 28/40] cxl/pci: Retrieve CXL DVSEC memory info
` [PATCH v3 29/40] cxl/pci: Implement wait for media active
` [PATCH v3 30/40] cxl/pci: Emit device serial number
` [PATCH v3 31/40] cxl/memdev: Add numa_node attribute
` [PATCH v3 32/40] cxl/core/port: Add switch port enumeration
` [PATCH v3 33/40] cxl/mem: Add the cxl_mem driver
  ` [PATCH v4 "
` [PATCH v3 34/40] cxl/core: Move target_list out of base decoder attributes
` [PATCH v3 35/40] cxl/core/port: Add endpoint decoders
` [PATCH v3 36/40] tools/testing/cxl: Mock dvsec_ranges()
` [PATCH v3 37/40] tools/testing/cxl: Fix root port to host bridge assignment
` [PATCH v3 38/40] tools/testing/cxl: Mock one level of switches
` [PATCH v3 39/40] tools/testing/cxl: Enumerate mock decoders
` [PATCH v3 40/40] tools/testing/cxl: Add a physical_node link

[PATCH 0/2] cxl/port: Robustness fixes for decoder enumeration
 2022-01-26  5:24 UTC  (3+ messages)
` [PATCH 1/2] cxl/core/port: Fix / relax decoder target enumeration
` [PATCH 2/2] cxl/core/port: Handle invalid decoders

[ndctl PATCH 00/37] cxl: Full topology enumeration
 2022-01-24  0:55 UTC  (38+ messages)
` [ndctl PATCH 01/37] test: Add 'suite' identifiers to tests
` [ndctl PATCH 02/37] ndctl: Rename util_filter to ndctl_filter
` [ndctl PATCH 03/37] build: Add tags
` [ndctl PATCH 04/37] json: Add support for json_object_new_uint64()
` [ndctl PATCH 05/37] cxl/json: Cleanup object leak false positive
` [ndctl PATCH 06/37] cxl/list: Support multiple memdev device name filter arguments
` [ndctl PATCH 07/37] cxl/list: Support comma separated lists
` [ndctl PATCH 08/37] cxl/list: Introduce cxl_filter_walk()
` [ndctl PATCH 09/37] cxl/list: Emit device serial numbers
` [ndctl PATCH 10/37] cxl/list: Add filter by serial support
` [ndctl PATCH 11/37] cxl/lib: Rename nvdimm bridge to pmem
` [ndctl PATCH 12/37] cxl/list: Cleanup options definitions
` [ndctl PATCH 13/37] Documentation: Enhance libcxl memdev API documentation
` [ndctl PATCH 14/37] cxl/list: Add bus objects
` [ndctl PATCH 15/37] util/json: Warn on stderr about empty list results
` [ndctl PATCH 16/37] util/sysfs: Uplevel modalias lookup helper to util/
` [ndctl PATCH 17/37] cxl/list: Add port enumeration
` [ndctl PATCH 18/37] cxl/list: Add --debug option
` [ndctl PATCH 19/37] cxl/list: Add endpoints
` [ndctl PATCH 20/37] cxl/list: Add 'host' entries for port-like objects
` [ndctl PATCH 21/37] cxl/list: Add 'host' entries for memdevs
` [ndctl PATCH 22/37] cxl/list: Move enabled memdevs underneath their endpoint
` [ndctl PATCH 23/37] cxl/list: Filter memdev by ancestry
` [ndctl PATCH 24/37] cxl/memdev: Use a local logger for debug
` [ndctl PATCH 25/37] cxl/memdev: Cleanup memdev filter
` [ndctl PATCH 26/37] cxl/memdev: Add serial support for memdev-related commands
` [ndctl PATCH 27/37] cxl/list: Add 'numa_node' to memdev listings
` [ndctl PATCH 28/37] util: Implement common bind/unbind helpers
` [ndctl PATCH 29/37] cxl/memdev: Enable / disable support
` [ndctl PATCH 30/37] cxl/list: Add decoder support
` [ndctl PATCH 31/37] cxl/list: Extend decoder objects with target information
` [ndctl PATCH 32/37] cxl/list: Use 'physical_node' for root port attachment detection
` [ndctl PATCH 33/37] cxl/list: Reuse the --target option for ports
` [ndctl PATCH 34/37] cxl/list: Support filtering memdevs by decoders
` [ndctl PATCH 35/37] cxl/list: Support filtering memdevs by ports
` [ndctl PATCH 36/37] cxl/port: Add {disable,enable}-port command
` [ndctl PATCH 37/37] cxl/list: Filter dports and targets by memdevs