messages from 2022-01-28 17:52:50 to 2022-02-02 15:44:52 UTC [more...]
[PATCH v3 00/40] CXL.mem Topology Discovery and Hotplug Support
2022-02-02 15:44 UTC (118+ messages)
` [PATCH v3 02/40] cxl/pci: Implement Interface Ready Timeout
` [PATCH v4 "
` [PATCH v3 03/40] cxl/pci: Defer mailbox status checks to command timeouts
` [PATCH v3 08/40] cxl/core/port: Rename bus.c to port.c
` [PATCH v3 09/40] cxl/decoder: Hide physical address information from non-root
` [PATCH v3 11/40] cxl/core/port: Clarify decoder creation
` [PATCH v4 "
` [PATCH v3 12/40] cxl/core: Fix cxl_probe_component_regs() error message
` [PATCH v3 13/40] cxl/core/port: Make passthrough decoder init implicit
` [PATCH v3 14/40] cxl/core: Track port depth
` [PATCH v3 15/40] cxl: Prove CXL locking
` [PATCH v4 "
` [PATCH v3 17/40] cxl/port: Introduce cxl_port_to_pci_bus()
` [PATCH v4 "
` [PATCH v3 19/40] cxl/port: Up-level cxl_add_dport() locking requirements to the caller
` [PATCH v4 "
` [PATCH v3 20/40] cxl/pci: Rename pci.h to cxlpci.h
` [PATCH v3 21/40] cxl/core: Generalize dport enumeration in the core
` [PATCH v4 "
` [PATCH v3 22/40] cxl/core/hdm: Add CXL standard decoder enumeration to "
` [PATCH v4 "
` [PATCH v5 "
` [PATCH v3 23/40] cxl/core: Emit modalias for CXL devices
` [PATCH v3 25/40] cxl/core/port: Remove @host argument for dport + decoder enumeration
` [PATCH v4 "
` [PATCH v3 26/40] cxl/pci: Store component register base in cxlds
` [PATCH v4 "
` [PATCH v3 27/40] cxl/pci: Cache device DVSEC offset
` [PATCH v4 "
` [PATCH v3 28/40] cxl/pci: Retrieve CXL DVSEC memory info
` [PATCH v4 "
` [PATCH v3 29/40] cxl/pci: Implement wait for media active
` [PATCH v3 30/40] cxl/pci: Emit device serial number
` [PATCH v4 "
` [PATCH v3 31/40] cxl/memdev: Add numa_node attribute
` [PATCH v3 32/40] cxl/core/port: Add switch port enumeration
` [PATCH v3 34/40] cxl/core: Move target_list out of base decoder attributes
` [PATCH v3 35/40] cxl/core/port: Add endpoint decoders
` [PATCH v3 40/40] tools/testing/cxl: Add a physical_node link
[PATCH v5 00/43] CXl 2.0 emulation Support
2022-02-02 14:10 UTC (44+ messages)
` [PATCH v5 01/43] hw/pci/cxl: Add a CXL component type (interface)
` [PATCH v5 02/43] hw/cxl/component: Introduce CXL components (8.1.x, 8.2.5)
` [PATCH v5 03/43] MAINTAINERS: Add entry for Compute Express Link Emulation
` [PATCH v5 04/43] hw/cxl/device: Introduce a CXL device (8.2.8)
` [PATCH v5 05/43] hw/cxl/device: Implement the CAP array (8.2.8.1-2)
` [PATCH v5 06/43] hw/cxl/device: Implement basic mailbox (8.2.8.4)
` [PATCH v5 07/43] hw/cxl/device: Add memory device utilities
` [PATCH v5 08/43] hw/cxl/device: Add cheap EVENTS implementation (8.2.9.1)
` [PATCH v5 09/43] hw/cxl/device: Timestamp implementation (8.2.9.3)
` [PATCH v5 10/43] hw/cxl/device: Add log commands (8.2.9.4) + CEL
` [PATCH v5 11/43] hw/pxb: Use a type for realizing expanders
` [PATCH v5 12/43] hw/pci/cxl: Create a CXL bus type
` [PATCH v5 13/43] hw/pxb: Allow creation of a CXL PXB (host bridge)
` [PATCH v5 14/43] tests/acpi: allow DSDT.viot table changes
` [PATCH v5 15/43] acpi/pci: Consolidate host bridge setup
` [PATCH v5 16/43] tests/acpi: Add update DSDT.viot
` [PATCH v5 17/43] cxl: Machine level control on whether CXL support is enabled
` [PATCH v5 18/43] hw/cxl/component: Implement host bridge MMIO (8.2.5, table 142)
` [PATCH v5 19/43] hw/cxl/rp: Add a root port
` [PATCH v5 20/43] hw/cxl/device: Add a memory device (8.2.8.5)
` [PATCH v5 21/43] hw/cxl/device: Implement MMIO HDM decoding (8.2.5.12)
` [PATCH v5 22/43] acpi/cxl: Add _OSC implementation (9.14.2)
` [PATCH v5 23/43] tests/acpi: allow CEDT table addition
` [PATCH v5 24/43] acpi/cxl: Create the CEDT (9.14.1)
` [PATCH v5 25/43] hw/cxl/device: Add some trivial commands
` [PATCH v5 26/43] hw/cxl/device: Plumb real Label Storage Area (LSA) sizing
` [PATCH v5 27/43] hw/cxl/device: Implement get/set Label Storage Area (LSA)
` [PATCH v5 28/43] hw/cxl/component: Add utils for interleave parameter encoding/decoding
` [PATCH v5 29/43] hw/cxl/host: Add support for CXL Fixed Memory Windows
` [PATCH v5 30/43] acpi/cxl: Introduce CFMWS structures in CEDT
` [PATCH v5 31/43] hw/pci-host/gpex-acpi: Add support for dsdt construction for pxb-cxl
` [PATCH v5 32/43] pci/pcie_port: Add pci_find_port_by_pn()
` [PATCH v5 33/43] CXL/cxl_component: Add cxl_get_hb_cstate()
` [PATCH v5 34/43] mem/cxl_type3: Add read and write functions for associated hostmem
` [PATCH v5 35/43] cxl/cxl-host: Add memops for CFMWS region
` [PATCH v5 36/43] arm/virt: Allow virt/CEDT creation
` [PATCH v5 37/43] hw/arm/virt: Basic CXL enablement on pci_expander_bridge instances pxb-cxl
` [PATCH v5 38/43] RFC: softmmu/memory: Add ops to memory_region_ram_init_from_file
` [PATCH v5 39/43] hw/cxl/component Add a dumb HDM decoder handler
` [PATCH v5 40/43] i386/pc: Enable CXL fixed memory windows
` [PATCH v5 41/43] qtest/acpi: Add reference CEDT tables
` [PATCH v5 42/43] qtest/cxl: Add very basic sanity tests
` [PATCH v5 43/43] scripts/device-crash-test: Add exception for pxb-cxl
[PATCH v3 24/40] cxl/port: Add a driver for 'struct cxl_port' objects
2022-02-02 9:33 UTC (6+ messages)
` [PATCH v4 "
` [PATCH v5 "
[PATCH v3 00/14] CXL Region driver
2022-02-01 23:11 UTC (18+ messages)
` [PATCH v3 01/14] cxl/region: Add region creation ABI
` [PATCH v3 02/14] cxl/region: Introduce concept of region configuration
` [PATCH v3 04/14] cxl/region: Introduce a cxl_region driver
` [PATCH v3 09/14] cxl/region: Add infrastructure for decoder programming
` [PATCH v3 10/14] cxl/region: Collect host bridge decoders
` [PATCH v3 11/14] cxl/region: Add support for single switch level
[PATCH V6 00/10] CXL: Read CDAT and DSMAS data from the device
2022-02-01 22:37 UTC (19+ messages)
` [PATCH V6 01/10] PCI: Add vendor ID for the PCI SIG
` [PATCH V6 02/10] PCI: Replace magic constant for PCI Sig Vendor ID
` [PATCH V6 03/10] PCI/DOE: Add Data Object Exchange Aux Driver
` [PATCH V6 04/10] PCI/DOE: Introduce pci_doe_create_doe_devices
` [PATCH V6 05/10] cxl/pci: Create DOE auxiliary devices
` [PATCH V6 06/10] cxl/pci: Find the DOE mailbox which supports CDAT
` [PATCH V6 07/10] cxl/mem: Read CDAT table
` [PATCH V6 08/10] cxl/cdat: Introduce cdat_hdr_valid()
` [PATCH V6 09/10] cxl/mem: Retry reading CDAT on failure
` [PATCH V6 10/10] cxl/cdat: Parse out DSMAS data from CDAT table
[PATCH] cxl/regs: Fix size of CXL Capability Header Register
2022-02-01 18:29 UTC (2+ messages)
[PATCH v3 33/40] cxl/mem: Add the cxl_mem driver
2022-02-01 17:44 UTC (4+ messages)
` [PATCH v4 "
[PATCH 0/2] cxl/port: Robustness fixes for decoder enumeration
2022-02-01 12:59 UTC (5+ messages)
` [PATCH 1/2] cxl/core/port: Fix / relax decoder target enumeration
` [PATCH 2/2] cxl/core/port: Handle invalid decoders
[PATCH v4 18/40] cxl/pmem: Introduce a find_cxl_root() helper
2022-02-01 10:59 UTC (7+ messages)
` [PATCH v5 "
` [PATCH v6 "
[PATCH v3 16/40] cxl/core/port: Use dedicated lock for decoder target list
2022-02-01 10:52 UTC (10+ messages)
` [PATCH v4 "
` [PATCH v5 "
[ndctl PATCH v3 0/6] Add partitioning support for CXL memdevs
2022-02-01 1:34 UTC (8+ messages)
` [ndctl PATCH v3 5/6] libcxl: add interfaces for SET_PARTITION_INFO mailbox command
[RFC PATCH 0/3] Add PCIe enclosure management support
2022-01-31 11:59 UTC (3+ messages)
` [RFC PATCH 2/3] Add PCIe enclosure management auxiliary driver
[ndctl PATCH v5 00/16] Initial CXL support
2022-01-31 11:47 UTC (3+ messages)
` [ndctl PATCH v5 04/16] util: add the struct_size() helper from the kernel
Treating CXL Type 3 device as a block device
2022-01-28 19:50 UTC (3+ messages)
[PATCH v4 00/42] CXl 2.0 emulation Support
2022-01-28 18:48 UTC (12+ messages)
` [PATCH v4 09/42] hw/cxl/device: Timestamp implementation (8.2.9.3)
` [PATCH v4 13/42] hw/pxb: Allow creation of a CXL PXB (host bridge)
` [PATCH v4 14/42] tests/acpi: allow DSDT.viot table changes
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