From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 49E3FC433F5 for ; Wed, 22 Sep 2021 00:45:12 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 22569611C9 for ; Wed, 22 Sep 2021 00:45:12 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229752AbhIVAqk (ORCPT ); Tue, 21 Sep 2021 20:46:40 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37122 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229480AbhIVAqj (ORCPT ); Tue, 21 Sep 2021 20:46:39 -0400 Received: from mail-ot1-x32b.google.com (mail-ot1-x32b.google.com [IPv6:2607:f8b0:4864:20::32b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A6F99C061574 for ; Tue, 21 Sep 2021 17:45:10 -0700 (PDT) Received: by mail-ot1-x32b.google.com with SMTP id c8-20020a9d6c88000000b00517cd06302dso1040847otr.13 for ; Tue, 21 Sep 2021 17:45:10 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=intel-com.20210112.gappssmtp.com; s=20210112; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=Q1iP5KefHqJWJ5qGAUDoYDJOyAD6pRFAZFOdaM0VUL4=; b=jEV6CpbXyr07JLXO1bp0yl7i+yms+T5LIGT6MwHF6pP/qG0RKnqzaXHP3PbaieYwko eiScBzgb/WsN+NvJnLl4t8FPVlcFSgH/ZYjXW0/dbKO8sDVbmqypt0rMXr/wg/O17Tkw VCUIukQzVQgK1p7wiXp5KbANB4eSFvjqbS6OufBZMTspLK6VKofrcLONrnjzcIffavOC sNTa24qsbj2zFf23cxhht8n9gEF7RhZZo41SmCRXkMlwxpqSt58N/iAWCoubiKQXzd6R P/Cfteln8igvgHe402qPDEmVCaUsIYLBxJvVa7PNvlpLnWka4d7kIA4Xvn0Ali7BjTJS KdGA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=Q1iP5KefHqJWJ5qGAUDoYDJOyAD6pRFAZFOdaM0VUL4=; b=tqXviI4IOfN3SS7IHKuhKuLI+8cacwdb0XNaBZ3ICK4zGUfU1Iej+SeaY2JfFCMyBb 9Ouhee2Fri8UXe26A9hsu8ezGNY0lRfZEbAYOfLn+EjMvie6HxD9G+rHdp5UPwLTm30K M2jHThW9vCqHdnfAav5tSOg/jOf75s3fbT5kkf+6QdQr7df0C8M/+kqOa31jZvuSgHgU YCII03ArqKfKw4dzqC78iXui7jjvC4Cu5fuvUwH4LnJRMGIMmHdREoF62wUHXblLBHcI nmkf9TYJcHERXuCbvQRdpFHI4ri07VFAy1oUeecH97CpIXtv7lxED09VuDn9LCXxkoJE 0dXw== X-Gm-Message-State: AOAM5304nKn94OF1bOxMSl0jlCj8c6JroBxtuYciVF/Png3htXJnGeP1 I7LqerhjiCxQe5KJdoIrxpvvGIltGHbcP9bpoPkxPA== X-Google-Smtp-Source: ABdhPJwmYVkzrdW65h9xNSUrnW1faCzIMwKQt+WpaGKLoqWCC3rgZnXMLk+Dnzi5GMg1Owh3toA9VWsUpQuh0BoWQos= X-Received: by 2002:a9d:6359:: with SMTP id y25mr28065477otk.274.1632271510013; Tue, 21 Sep 2021 17:45:10 -0700 (PDT) MIME-Version: 1.0 References: <20210921220459.2437386-1-ben.widawsky@intel.com> <20210921220459.2437386-8-ben.widawsky@intel.com> In-Reply-To: <20210921220459.2437386-8-ben.widawsky@intel.com> From: Dan Williams Date: Tue, 21 Sep 2021 17:44:58 -0700 Message-ID: Subject: Re: [PATCH 7/7] ocxl: Use pci core's DVSEC functionality To: Ben Widawsky Cc: linux-cxl@vger.kernel.org, Linux PCI , linuxppc-dev , Frederic Barrat , Andrew Donnellan , Alison Schofield , Ira Weiny , Jonathan Cameron , Vishal Verma Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: linux-cxl@vger.kernel.org On Tue, Sep 21, 2021 at 3:05 PM Ben Widawsky wrote: > > Reduce maintenance burden of DVSEC query implementation by using the > centralized PCI core implementation. > > Cc: linuxppc-dev@lists.ozlabs.org > Cc: Frederic Barrat > Cc: Andrew Donnellan > Signed-off-by: Ben Widawsky > --- > drivers/misc/ocxl/config.c | 13 +------------ > 1 file changed, 1 insertion(+), 12 deletions(-) > > diff --git a/drivers/misc/ocxl/config.c b/drivers/misc/ocxl/config.c > index a68738f38252..e401a51596b9 100644 > --- a/drivers/misc/ocxl/config.c > +++ b/drivers/misc/ocxl/config.c > @@ -33,18 +33,7 @@ > > static int find_dvsec(struct pci_dev *dev, int dvsec_id) > { > - int vsec = 0; > - u16 vendor, id; > - > - while ((vsec = pci_find_next_ext_capability(dev, vsec, > - OCXL_EXT_CAP_ID_DVSEC))) { > - pci_read_config_word(dev, vsec + OCXL_DVSEC_VENDOR_OFFSET, > - &vendor); > - pci_read_config_word(dev, vsec + OCXL_DVSEC_ID_OFFSET, &id); > - if (vendor == PCI_VENDOR_ID_IBM && id == dvsec_id) > - return vsec; > - } > - return 0; > + return pci_find_dvsec_capability(dev, PCI_VENDOR_ID_IBM, dvsec_id); > } What about: arch/powerpc/platforms/powernv/ocxl.c::find_dvsec_from_pos() ...? With that converted the redundant definitions below: OCXL_EXT_CAP_ID_DVSEC OCXL_DVSEC_VENDOR_OFFSET OCXL_DVSEC_ID_OFFSET ...can be cleaned up in favor of the core definitions.