From: Dan Williams <dan.j.williams@intel.com>
To: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Cc: linux-cxl@vger.kernel.org, Ben Widawsky <ben.widawsky@intel.com>,
Vishal L Verma <vishal.l.verma@intel.com>,
"Schofield, Alison" <alison.schofield@intel.com>,
"Weiny, Ira" <ira.weiny@intel.com>,
Linux PCI <linux-pci@vger.kernel.org>
Subject: Re: [PATCH 3/8] cxl/pci: Kill cxl_map_regs()
Date: Fri, 18 Mar 2022 10:08:09 -0700 [thread overview]
Message-ID: <CAPcyv4h9e4ON98Vc23fSAZ2f7-vWP1+0Zu6hNvubfcWuY1VbzA@mail.gmail.com> (raw)
In-Reply-To: <20220317100947.000060f9@Huawei.com>
On Thu, Mar 17, 2022 at 3:10 AM Jonathan Cameron
<Jonathan.Cameron@huawei.com> wrote:
>
> On Tue, 15 Mar 2022 21:13:58 -0700
> Dan Williams <dan.j.williams@intel.com> wrote:
>
> > The component registers are currently unused by the cxl_pci driver.
> > Only the physical address base of the component registers is conveyed to
> > the cxl_mem driver. Just call cxl_map_device_registers() directly.
> >
> > Signed-off-by: Dan Williams <dan.j.williams@intel.com>
> Makes sense. Not sure how we ended up with the unused component register
> handling. I guess code evolution...
Yeah, this happened when the cxl_port and cxl_mem drivers split the
responsibility of those blocks to downstream drivers.
>
> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
>
> > ---
> > drivers/cxl/pci.c | 23 +----------------------
> > 1 file changed, 1 insertion(+), 22 deletions(-)
> >
> > diff --git a/drivers/cxl/pci.c b/drivers/cxl/pci.c
> > index 994c79bf6afd..0efbb356cce0 100644
> > --- a/drivers/cxl/pci.c
> > +++ b/drivers/cxl/pci.c
> > @@ -346,27 +346,6 @@ static int cxl_probe_regs(struct pci_dev *pdev, struct cxl_register_map *map)
> > return 0;
> > }
> >
> > -static int cxl_map_regs(struct cxl_dev_state *cxlds, struct cxl_register_map *map)
> > -{
> > - struct device *dev = cxlds->dev;
> > - struct pci_dev *pdev = to_pci_dev(dev);
> > -
> > - switch (map->reg_type) {
> > - case CXL_REGLOC_RBI_COMPONENT:
> > - cxl_map_component_regs(pdev, &cxlds->regs.component, map);
> > - dev_dbg(dev, "Mapping component registers...\n");
> > - break;
> > - case CXL_REGLOC_RBI_MEMDEV:
> > - cxl_map_device_regs(pdev, &cxlds->regs.device_regs, map);
> > - dev_dbg(dev, "Probing device registers...\n");
> > - break;
> > - default:
> > - break;
> > - }
> > -
> > - return 0;
> > -}
> > -
> > static int cxl_setup_regs(struct pci_dev *pdev, enum cxl_regloc_type type,
> > struct cxl_register_map *map)
> > {
> > @@ -599,7 +578,7 @@ static int cxl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
> > if (rc)
> > return rc;
> >
> > - rc = cxl_map_regs(cxlds, &map);
> > + rc = cxl_map_device_regs(pdev, &cxlds->regs.device_regs, &map);
> > if (rc)
> > return rc;
> >
> >
> >
>
next prev parent reply other threads:[~2022-03-18 17:08 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-03-16 4:13 [PATCH 0/8] cxl/pci: Add fundamental error handling Dan Williams
2022-03-16 4:13 ` [PATCH 1/8] cxl/pci: Cleanup repeated code in cxl_probe_regs() helpers Dan Williams
2022-03-17 10:02 ` Jonathan Cameron
2022-03-16 4:13 ` [PATCH 2/8] cxl/pci: Cleanup cxl_map_device_regs() Dan Williams
2022-03-17 10:07 ` Jonathan Cameron
2022-03-18 17:13 ` Dan Williams
2022-03-16 4:13 ` [PATCH 3/8] cxl/pci: Kill cxl_map_regs() Dan Williams
2022-03-17 10:09 ` Jonathan Cameron
2022-03-18 17:08 ` Dan Williams [this message]
2022-03-16 4:14 ` [PATCH 4/8] cxl/core/regs: Make cxl_map_{component, device}_regs() device generic Dan Williams
2022-03-17 10:25 ` Jonathan Cameron
2022-03-18 17:06 ` Dan Williams
2022-03-16 4:14 ` [PATCH 5/8] cxl/port: Limit the port driver to just the HDM Decoder Capability Dan Williams
2022-03-17 10:48 ` Jonathan Cameron
2022-03-16 4:14 ` [PATCH 6/8] cxl/pci: Prepare for mapping RAS Capability Structure Dan Williams
2022-03-17 10:56 ` Jonathan Cameron
2022-03-18 19:51 ` Dan Williams
2022-03-17 17:32 ` Ben Widawsky
2022-03-18 16:19 ` Dan Williams
2022-03-16 4:14 ` [PATCH 7/8] cxl/pci: Find and map the " Dan Williams
2022-03-17 15:10 ` Jonathan Cameron
2022-03-16 4:14 ` [PATCH 8/8] cxl/pci: Add (hopeful) error handling support Dan Williams
2022-03-17 15:16 ` Jonathan Cameron
2022-03-18 9:41 ` Shiju Jose
2022-04-24 22:15 ` Dan Williams
2022-03-16 4:23 ` [PATCH 0/8] cxl/pci: Add fundamental error handling Dan Williams
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