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[79.47.255.93]) by smtp.gmail.com with ESMTPSA id v10sm11768209wrq.45.2020.04.15.09.01.11 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Wed, 15 Apr 2020 09:01:12 -0700 (PDT) From: To: "'Rob Herring'" Cc: "'Andy Gross'" , "'Bjorn Andersson'" , "'Kishon Vijay Abraham I'" , "'Mark Rutland'" , "'linux-arm-msm'" , , References: <20200403002608.946-1-ansuelsmth@gmail.com> <20200403002608.946-2-ansuelsmth@gmail.com> <20200414173838.GA29176@bogus> <00bb01d61321$05bf9b20$113ed160$@gmail.com> In-Reply-To: Subject: R: [PATCH 2/2] devicetree: bindings: phy: Document dwc3 qcom phy Date: Wed, 15 Apr 2020 18:01:10 +0200 Message-ID: <00e301d6133f$15efc1f0$41cf45d0$@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-Mailer: Microsoft Outlook 16.0 Content-Language: it Thread-Index: AQHTPQd2IBqR3z6CHNBmVjX+r+AcmAGqTdeSAYw2ek8CRq9kSAFT2oxuqEl6H+A= Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org > On Wed, Apr 15, 2020 at 7:26 AM wrote: > > > > > On Fri, Apr 03, 2020 at 02:26:05AM +0200, Ansuel Smith wrote: > > > > Document dwc3 qcom phy hs and ss phy bindings needed to = correctly > > > > inizialize and use usb on ipq806x SoC > > > > > > > > Signed-off-by: Ansuel Smith > > > > --- > > > > .../bindings/phy/qcom,dwc3-hs-usb-phy.yaml | 65 > > > +++++++++++++++++++ > > > > .../bindings/phy/qcom,dwc3-ss-usb-phy.yaml | 65 > > > +++++++++++++++++++ > > > > 2 files changed, 130 insertions(+) > > > > create mode 100644 > > > Documentation/devicetree/bindings/phy/qcom,dwc3-hs-usb-phy.yaml > > > > create mode 100644 > > > Documentation/devicetree/bindings/phy/qcom,dwc3-ss-usb-phy.yaml > > > > > > > > diff --git a/Documentation/devicetree/bindings/phy/qcom,dwc3-hs- > usb- > > > phy.yaml b/Documentation/devicetree/bindings/phy/qcom,dwc3-hs- > usb- > > > phy.yaml > > > > new file mode 100644 > > > > index 000000000000..0bb59e3c2ab8 > > > > --- /dev/null > > > > +++ b/Documentation/devicetree/bindings/phy/qcom,dwc3-hs-usb- > > > phy.yaml > > > > @@ -0,0 +1,65 @@ > > > > +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause > > > > +%YAML 1.2 > > > > +--- > > > > +$id: http://devicetree.org/schemas/phy/qcom,dwc3-hs-usb- > phy.yaml# > > > > +$schema: http://devicetree.org/meta-schemas/core.yaml# > > > > + > > > > +title: Qualcomm DWC3 HS PHY CONTROLLER > > > > + > > > > +maintainers: > > > > + - Ansuel Smith > > > > + > > > > +description: > > > > + DWC3 PHY nodes are defined to describe on-chip Synopsis = Physical > > > layer > > > > + controllers. Each DWC3 PHY controller should have its own = node. > > > > + > > > > +properties: > > > > + compatible: > > > > + const: qcom,dwc3-hs-usb-phy > > > > + > > > > + "#phy-cells": > > > > + const: 0 > > > > + > > > > + regmap: > > > > + maxItems: 1 > > > > + description: phandle to usb3 dts definition > > > > + > > > > + clocks: > > > > + minItems: 1 > > > > + maxItems: 2 > > > > + > > > > + clock-names: > > > > + minItems: 1 > > > > + maxItems: 2 > > > > + description: | > > > > + - "ref" Is required > > > > + - "xo" Optional external reference clock > > > > + items: > > > > + - const: ref > > > > + - const: xo > > > > + > > > > +required: > > > > + - compatible > > > > + - "#phy-cells" > > > > + - regmap > > > > + - clocks > > > > + - clock-names > > > > + > > > > +examples: > > > > + - | > > > > + #include > > > > + > > > > + hs_phy_0: hs_phy_0 { > > > > + compatible =3D "qcom,dwc3-hs-usb-phy"; > > > > + regmap =3D <&usb3_0>; > > > > > > If the registers for the phy are part of 'qcom,dwc3' then make = this node > > > a child of it. > > > > > > > Making this node a child of qcom,dwc3 cause malfunction of the = driver. >=20 > Fix the driver then. >=20 > Rob Sorry if i bother you but I checked every other usb driver that also = needs phy node. I use regmap phandle here just for the fact that it's the same reg of dwc3. Others use directly the same reg and are outside their dwc3 usb node. I think I will follow this path and respin this. I really hope you are good with this.