From: Taniya Das <tdas@codeaurora.org>
To: Stephen Boyd <sboyd@kernel.org>, Jeffrey Hugo <jeffrey.l.hugo@gmail.com>
Cc: Michael Turquette <mturquette@baylibre.com>,
David Brown <david.brown@linaro.org>,
Rajendra Nayak <rnayak@codeaurora.org>,
MSM <linux-arm-msm@vger.kernel.org>,
linux-soc@vger.kernel.org, linux-clk@vger.kernel.org,
lkml <linux-kernel@vger.kernel.org>,
DTML <devicetree@vger.kernel.org>, Rob Herring <robh@kernel.org>,
Rob Herring <robh+dt@kernel.org>
Subject: Re: [PATCH v2 3/8] dt-bindings: clock: Add YAML schemas for the QCOM GPUCC clock bindings
Date: Wed, 27 Nov 2019 04:06:49 +0000 [thread overview]
Message-ID: <0101016eab0a4e76-b8eb44c5-d076-46b9-a156-b80dc650ca31-000000@us-west-2.amazonses.com> (raw)
In-Reply-To: <20191126181154.275EA20727@mail.kernel.org>
On 11/26/2019 11:41 PM, Stephen Boyd wrote:
> Quoting Jeffrey Hugo (2019-11-15 07:11:01)
>> On Fri, Nov 15, 2019 at 3:07 AM Taniya Das <tdas@codeaurora.org> wrote:
>>> diff --git a/Documentation/devicetree/bindings/clock/qcom,gpucc.yaml b/Documentation/devicetree/bindings/clock/qcom,gpucc.yaml
>>> new file mode 100644
>>> index 0000000..c2d6243
>>> --- /dev/null
>>> +++ b/Documentation/devicetree/bindings/clock/qcom,gpucc.yaml
>>> @@ -0,0 +1,69 @@
>>> +# SPDX-License-Identifier: GPL-2.0-only
>>> +%YAML 1.2
>>> +---
>>> +$id: http://devicetree.org/schemas/bindings/clock/qcom,gpucc.yaml#
>>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
>>> +
>>> +title: Qualcomm Graphics Clock & Reset Controller Binding
>>> +
>>> +maintainers:
>>> + - Taniya Das <tdas@codeaurora.org>
>>> +
>>> +description: |
>>> + Qualcomm grpahics clock control module which supports the clocks, resets and
>>> + power domains.
>>> +
>>> +properties:
>>> + compatible:
>>> + enum:
>>> + - qcom,msm8998-gpucc
>>> + - qcom,sdm845-gpucc
>>> +
>>> + clocks:
>>> + minItems: 1
>>> + maxItems: 2
>>> + items:
>>> + - description: Board XO source
>>> + - description: GPLL0 source from GCC
>>
>> This is not an accurate conversion. GPLL0 was not valid for 845, and
>> is required for 8998.
>
> Thanks for checking Jeff.
>
> It looks like on 845 there are two gpll0 clocks going to gpucc. From
> gpu_cc_parent_map_0:
>
> "gcc_gpu_gpll0_clk_src",
> "gcc_gpu_gpll0_div_clk_src",
>
There are branches of GPLL0 which would be connected to most external
CCs. It is upto to the external CCs to either use them to source a
frequency or not.
--
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
of Code Aurora Forum, hosted by The Linux Foundation.
--
next prev parent reply other threads:[~2019-11-27 4:07 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-11-15 10:04 [PATCH v2 0/8] Add GPU & Video Clock controller driver for SC7180 Taniya Das
2019-11-15 10:04 ` [PATCH v2 1/8] clk: qcom: alpha-pll: Remove useless read from set rate Taniya Das
2019-12-24 6:37 ` Stephen Boyd
2019-11-15 10:04 ` [PATCH v2 2/8] clk: qcom: clk-alpha-pll: Add support for Fabia PLL calibration Taniya Das
2019-12-24 6:37 ` Stephen Boyd
2019-11-15 10:04 ` [PATCH v2 3/8] dt-bindings: clock: Add YAML schemas for the QCOM GPUCC clock bindings Taniya Das
2019-11-15 15:11 ` Jeffrey Hugo
2019-11-26 18:11 ` Stephen Boyd
2019-11-27 4:06 ` Taniya Das [this message]
2019-12-19 5:32 ` Stephen Boyd
2019-12-27 6:43 ` Taniya Das
2019-11-15 10:05 ` [PATCH v2 4/8] dt-bindings: clock: Introduce QCOM Graphics " Taniya Das
2019-11-15 10:05 ` [PATCH v2 5/8] clk: qcom: Add graphics clock controller driver for SC7180 Taniya Das
2019-11-15 10:05 ` [PATCH v2 6/8] dt-bindings: clock: Add YAML schemas for the QCOM VIDEOCC clock bindings Taniya Das
2019-11-15 10:05 ` [PATCH v2 7/8] dt-bindings: clock: Introduce QCOM Video " Taniya Das
2019-12-03 17:22 ` Rob Herring
2019-11-15 10:05 ` [PATCH v2 8/8] clk: qcom: Add video clock controller driver for SC7180 Taniya Das
2019-12-24 2:30 ` Stephen Boyd
2019-12-27 6:41 ` Taniya Das
2019-12-24 2:32 ` [PATCH v2 0/8] Add GPU & Video Clock " Stephen Boyd
2019-12-27 6:44 ` Taniya Das
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