From: Sibi Sankar <sibis@codeaurora.org>
To: Odelu Kukatla <okukatla@codeaurora.org>
Cc: georgi.djakov@linaro.org, bjorn.andersson@linaro.org,
evgreen@google.com, Andy Gross <agross@kernel.org>,
Georgi Djakov <djakov@kernel.org>,
Rob Herring <robh+dt@kernel.org>,
linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
sboyd@kernel.org, mdtipton@codeaurora.org, saravanak@google.com,
seansw@qti.qualcomm.com, elder@linaro.org,
linux-arm-msm-owner@vger.kernel.org
Subject: Re: [v6 1/3] dt-bindings: interconnect: Add EPSS L3 DT binding on SC7280
Date: Mon, 16 Aug 2021 23:39:07 +0530 [thread overview]
Message-ID: <141da7d1269c5cf91fbb260192521ab9@codeaurora.org> (raw)
In-Reply-To: <1628577962-3995-2-git-send-email-okukatla@codeaurora.org>
Hey Odelu,
Thanks for the patch.
On 2021-08-10 12:16, Odelu Kukatla wrote:
> Add Epoch Subsystem (EPSS) L3 interconnect provider binding on SC7280
> SoCs.
>
> Signed-off-by: Odelu Kukatla <okukatla@codeaurora.org>
> ---
> .../devicetree/bindings/interconnect/qcom,osm-l3.yaml | 9
> ++++++++-
> include/dt-bindings/interconnect/qcom,osm-l3.h | 10
> +++++++++-
> 2 files changed, 17 insertions(+), 2 deletions(-)
>
> diff --git
> a/Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml
> b/Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml
> index e701524..919fce4 100644
> --- a/Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml
> +++ b/Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml
> @@ -18,13 +18,20 @@ properties:
> compatible:
> enum:
> - qcom,sc7180-osm-l3
> + - qcom,sc7280-epss-l3
> - qcom,sc8180x-osm-l3
> - qcom,sdm845-osm-l3
> - qcom,sm8150-osm-l3
> - qcom,sm8250-epss-l3
>
> reg:
> - maxItems: 1
> + minItems: 1
> + maxItems: 4
> + items:
> + - description: OSM clock domain-0 base address and size
> + - description: OSM clock domain-1 base address and size
> + - description: OSM clock domain-2 base address and size
> + - description: OSM clock domain-3 base address and size
Looks like you missed addressing
Stephen's comment from v4 i.e.
having descriptions based on
compatibles.
>
> clocks:
> items:
> diff --git a/include/dt-bindings/interconnect/qcom,osm-l3.h
> b/include/dt-bindings/interconnect/qcom,osm-l3.h
> index 61ef649..99534a5 100644
> --- a/include/dt-bindings/interconnect/qcom,osm-l3.h
> +++ b/include/dt-bindings/interconnect/qcom,osm-l3.h
> @@ -1,6 +1,6 @@
> /* SPDX-License-Identifier: GPL-2.0 */
> /*
> - * Copyright (C) 2019 The Linux Foundation. All rights reserved.
> + * Copyright (C) 2019, 2021 The Linux Foundation. All rights reserved.
> */
>
> #ifndef __DT_BINDINGS_INTERCONNECT_QCOM_OSM_L3_H
> @@ -11,5 +11,13 @@
>
> #define MASTER_EPSS_L3_APPS 0
> #define SLAVE_EPSS_L3_SHARED 1
> +#define SLAVE_EPSS_L3_CPU0 2
> +#define SLAVE_EPSS_L3_CPU1 3
> +#define SLAVE_EPSS_L3_CPU2 4
> +#define SLAVE_EPSS_L3_CPU3 5
> +#define SLAVE_EPSS_L3_CPU4 6
> +#define SLAVE_EPSS_L3_CPU5 7
> +#define SLAVE_EPSS_L3_CPU6 8
> +#define SLAVE_EPSS_L3_CPU7 9
>
> #endif
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project.
next prev parent reply other threads:[~2021-08-16 18:09 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <1628577962-3995-1-git-send-email-okukatla@codeaurora.org>
2021-08-10 6:46 ` [v6 1/3] dt-bindings: interconnect: Add EPSS L3 DT binding on SC7280 Odelu Kukatla
2021-08-16 18:09 ` Sibi Sankar [this message]
2021-08-10 6:46 ` [v6 3/3] arm64: dts: qcom: sc7280: Add EPSS L3 interconnect provider Odelu Kukatla
2021-08-10 12:33 ` Georgi Djakov
2021-08-16 17:44 ` okukatla
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