From: Vivek Gautam <vivek.gautam-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
To: joro-zLv9SwRftAIdnm+yROfE0A@public.gmane.org,
robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org,
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gregkh-hQyY1W1yCW8ekmWlsbkhG0B+6BGkLq7r@public.gmane.org,
robdclark-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org,
will.deacon-5wv7dgnIgG8@public.gmane.org,
robin.murphy-5wv7dgnIgG8@public.gmane.org,
sboyd-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org,
iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-pm-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
dri-devel-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org,
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Cc: len.brown-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org,
airlied-cv59FeDIM0c@public.gmane.org,
linux-arm-msm-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
pavel-+ZI9xUNit7I@public.gmane.org
Subject: [PATCH v5 5/6] iommu/arm-smmu: Add support for qcom,smmu-v2 variant
Date: Tue, 9 Jan 2018 15:31:48 +0530 [thread overview]
Message-ID: <1515492109-753-6-git-send-email-vivek.gautam@codeaurora.org> (raw)
In-Reply-To: <1515492109-753-1-git-send-email-vivek.gautam-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
qcom,smmu-v2 is an arm,smmu-v2 implementation with specific
clock and power requirements. This smmu core is used with
multiple masters on msm8996, viz. mdss, video, etc.
Add bindings for the same.
Signed-off-by: Vivek Gautam <vivek.gautam-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
---
* Major change in this patch -
Changed compatible string from 'qcom,msm8996-smmu-v2' to
'qcom,smmu-v2' to reflect the IP version rather than the
platform on which it is used.
The same IP is used across multiple platforms including msm8996,
and sdm845 etc.
.../devicetree/bindings/iommu/arm,smmu.txt | 35 ++++++++++++++++++++++
drivers/iommu/arm-smmu.c | 13 ++++++++
2 files changed, 48 insertions(+)
diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu.txt b/Documentation/devicetree/bindings/iommu/arm,smmu.txt
index 8a6ffce12af5..e4951288c87c 100644
--- a/Documentation/devicetree/bindings/iommu/arm,smmu.txt
+++ b/Documentation/devicetree/bindings/iommu/arm,smmu.txt
@@ -17,6 +17,7 @@ conditions.
"arm,mmu-401"
"arm,mmu-500"
"cavium,smmu-v2"
+ "qcom,smmu-v2"
depending on the particular implementation and/or the
version of the architecture implemented.
@@ -71,6 +72,23 @@ conditions.
or using stream matching with #iommu-cells = <2>, and
may be ignored if present in such cases.
+- clock-names: Should be "bus", and "iface" for "qcom,smmu-v2"
+ implementation.
+
+ "bus" clock for "qcom,smmu-v2" is required for downstream
+ bus access and for the smmu ptw.
+
+ "iface" clock is required to access smmu's registers through
+ the TCU's programming interface.
+
+- clocks: Phandles for respective clocks described by clock-names.
+
+- power-domains: Phandles to SMMU's power domain specifier. This is
+ required even if SMMU belongs to the master's power
+ domain, as the SMMU will have to be enabled and
+ accessed before master gets enabled and linked to its
+ SMMU.
+
** Deprecated properties:
- mmu-masters (deprecated in favour of the generic "iommus" binding) :
@@ -137,3 +155,20 @@ conditions.
iommu-map = <0 &smmu3 0 0x400>;
...
};
+
+ /* Qcom's arm,smmu-v2 implementation */
+ smmu4: iommu {
+ compatible = "qcom,smmu-v2";
+ reg = <0xd00000 0x10000>;
+
+ #global-interrupts = <1>;
+ interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>;
+ #iommu-cells = <1>;
+ power-domains = <&mmcc MDSS_GDSC>;
+
+ clocks = <&mmcc SMMU_MDP_AXI_CLK>,
+ <&mmcc SMMU_MDP_AHB_CLK>;
+ clock-names = "bus", "iface";
+ };
diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c
index 33bbcfedb896..2ade214c41bc 100644
--- a/drivers/iommu/arm-smmu.c
+++ b/drivers/iommu/arm-smmu.c
@@ -119,6 +119,7 @@ enum arm_smmu_implementation {
GENERIC_SMMU,
ARM_MMU500,
CAVIUM_SMMUV2,
+ QCOM_SMMUV2,
};
struct arm_smmu_s2cr {
@@ -1971,6 +1972,17 @@ struct arm_smmu_match_data {
ARM_SMMU_MATCH_DATA(arm_mmu500, ARM_SMMU_V2, ARM_MMU500);
ARM_SMMU_MATCH_DATA(cavium_smmuv2, ARM_SMMU_V2, CAVIUM_SMMUV2);
+static const char * const qcom_smmuv2_clks[] = {
+ "bus", "iface",
+};
+
+static const struct arm_smmu_match_data qcom_smmuv2 = {
+ .version = ARM_SMMU_V2,
+ .model = QCOM_SMMUV2,
+ .clks = qcom_smmuv2_clks,
+ .num_clks = ARRAY_SIZE(qcom_smmuv2_clks),
+};
+
static const struct of_device_id arm_smmu_of_match[] = {
{ .compatible = "arm,smmu-v1", .data = &smmu_generic_v1 },
{ .compatible = "arm,smmu-v2", .data = &smmu_generic_v2 },
@@ -1978,6 +1990,7 @@ struct arm_smmu_match_data {
{ .compatible = "arm,mmu-401", .data = &arm_mmu401 },
{ .compatible = "arm,mmu-500", .data = &arm_mmu500 },
{ .compatible = "cavium,smmu-v2", .data = &cavium_smmuv2 },
+ { .compatible = "qcom,smmu-v2", .data = &qcom_smmuv2 },
{ },
};
MODULE_DEVICE_TABLE(of, arm_smmu_of_match);
--
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
of Code Aurora Forum, hosted by The Linux Foundation
next prev parent reply other threads:[~2018-01-09 10:01 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-01-09 10:01 [PATCH v5 0/6] iommu/arm-smmu: Add runtime pm/sleep support Vivek Gautam
[not found] ` <1515492109-753-1-git-send-email-vivek.gautam-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2018-01-09 10:01 ` [PATCH v5 1/6] base: power: runtime: Export pm_runtime_get/put_suppliers Vivek Gautam
[not found] ` <1515492109-753-2-git-send-email-vivek.gautam-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2018-01-11 22:53 ` Rafael J. Wysocki
[not found] ` <CAJZ5v0h-+r3_xxjkgavza8SLAKSnUsXCRqn7PHxSVpeVnCkwHA-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2018-01-12 5:47 ` Vivek Gautam
2018-01-09 10:01 ` [PATCH v5 2/6] iommu/arm-smmu: Add pm_runtime/sleep ops Vivek Gautam
2018-01-09 10:01 ` [PATCH v5 3/6] iommu/arm-smmu: Invoke pm_runtime during probe, add/remove device Vivek Gautam
2018-01-09 10:01 ` Vivek Gautam [this message]
[not found] ` <1515492109-753-6-git-send-email-vivek.gautam-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2018-01-11 22:23 ` [PATCH v5 5/6] iommu/arm-smmu: Add support for qcom, smmu-v2 variant Rob Herring
2018-01-12 5:29 ` Vivek Gautam
2018-01-09 10:01 ` [PATCH v5 6/6] drm/msm: iommu: Replace runtime calls with runtime suppliers Vivek Gautam
2018-01-09 10:01 ` [PATCH v5 4/6] iommu/arm-smmu: Add the device_link between masters and smmu Vivek Gautam
2018-01-09 11:23 ` [PATCH v5 0/6] iommu/arm-smmu: Add runtime pm/sleep support Rafael J. Wysocki
[not found] ` <1568773.GtDhb2pIXv-yvgW3jdyMHm1GS7QM15AGw@public.gmane.org>
2018-01-09 11:49 ` Vivek Gautam
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