From: CK Hu <ck.hu@mediatek.com>
To: Dennis YC Hsieh <dennis-yc.hsieh@mediatek.com>
Cc: Rob Herring <robh+dt@kernel.org>,
Matthias Brugger <matthias.bgg@gmail.com>,
Jassi Brar <jassisinghbrar@gmail.com>,
<linux-kernel@vger.kernel.org>,
<linux-mediatek@lists.infradead.org>,
<devicetree@vger.kernel.org>, <wsd_upstream@mediatek.com>,
Bibby Hsieh <bibby.hsieh@mediatek.com>,
Houlong Wei <houlong.wei@mediatek.com>,
<linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH v1 07/12] soc: mediatek: cmdq: add write_s function
Date: Fri, 22 Nov 2019 16:56:37 +0800 [thread overview]
Message-ID: <1574412997.19450.16.camel@mtksdaap41> (raw)
In-Reply-To: <1574327552-11806-8-git-send-email-dennis-yc.hsieh@mediatek.com>
Hi, Dennis:
On Thu, 2019-11-21 at 17:12 +0800, Dennis YC Hsieh wrote:
> add write_s function in cmdq helper functions which
> support large dma access.
>
> Signed-off-by: Dennis YC Hsieh <dennis-yc.hsieh@mediatek.com>
> ---
> drivers/soc/mediatek/mtk-cmdq-helper.c | 34 ++++++++++++++++++++++++++++++
> include/linux/mailbox/mtk-cmdq-mailbox.h | 2 ++
> include/linux/soc/mediatek/mtk-cmdq.h | 13 ++++++++++++
> 3 files changed, 49 insertions(+)
>
> diff --git a/drivers/soc/mediatek/mtk-cmdq-helper.c b/drivers/soc/mediatek/mtk-cmdq-helper.c
> index d419e99..1b074a9 100644
> --- a/drivers/soc/mediatek/mtk-cmdq-helper.c
> +++ b/drivers/soc/mediatek/mtk-cmdq-helper.c
> @@ -15,6 +15,9 @@
> #define CMDQ_EOC_CMD ((u64)((CMDQ_CODE_EOC << CMDQ_OP_CODE_SHIFT)) \
> << 32 | CMDQ_EOC_IRQ_EN)
> #define CMDQ_REG_TYPE 1
> +#define CMDQ_ADDR_HIGH(addr) ((u32)(((addr) >> 16) & GENMASK(31, 0)))
> +#define CMDQ_ADDR_LOW_BIT BIT(1)
> +#define CMDQ_ADDR_LOW(addr) ((u16)(addr) | CMDQ_ADDR_LOW_BIT)
>
> struct cmdq_instruction {
> union {
> @@ -224,6 +227,37 @@ int cmdq_pkt_write_mask(struct cmdq_pkt *pkt, u8 subsys,
> }
> EXPORT_SYMBOL(cmdq_pkt_write_mask);
>
> +int cmdq_pkt_write_s(struct cmdq_pkt *pkt, dma_addr_t addr,
> + u32 value, u32 mask)
> +{
> + struct cmdq_instruction inst = { {0} };
> + int err;
> + const u16 dst_reg_idx = CMDQ_SPR_TEMP;
> +
> + err = cmdq_pkt_assign(pkt, dst_reg_idx, CMDQ_ADDR_HIGH(addr));
> + if (err < 0)
> + return err;
> +
> + if (mask != U32_MAX) {
> + inst.op = CMDQ_CODE_MASK;
> + inst.mask = ~mask;
> + err = cmdq_pkt_append_command(pkt, inst);
> + if (err < 0)
> + return err;
> +
> + inst.op = CMDQ_CODE_WRITE_S_MASK;
> + } else {
> + inst.op = CMDQ_CODE_WRITE_S;
> + }
> +
> + inst.sop = dst_reg_idx;
> + inst.offset = CMDQ_ADDR_LOW(addr);
> + inst.value = value;
> +
> + return cmdq_pkt_append_command(pkt, inst);
> +}
> +EXPORT_SYMBOL(cmdq_pkt_write_s);
> +
> int cmdq_pkt_wfe(struct cmdq_pkt *pkt, u16 event)
> {
> struct cmdq_instruction inst = { {0} };
> diff --git a/include/linux/mailbox/mtk-cmdq-mailbox.h b/include/linux/mailbox/mtk-cmdq-mailbox.h
> index 121c3bb..8ef87e1 100644
> --- a/include/linux/mailbox/mtk-cmdq-mailbox.h
> +++ b/include/linux/mailbox/mtk-cmdq-mailbox.h
> @@ -59,6 +59,8 @@ enum cmdq_code {
> CMDQ_CODE_JUMP = 0x10,
> CMDQ_CODE_WFE = 0x20,
> CMDQ_CODE_EOC = 0x40,
> + CMDQ_CODE_WRITE_S = 0x90,
> + CMDQ_CODE_WRITE_S_MASK = 0x91,
> CMDQ_CODE_LOGIC = 0xa0,
> };
>
> diff --git a/include/linux/soc/mediatek/mtk-cmdq.h b/include/linux/soc/mediatek/mtk-cmdq.h
> index 8334021..8dbd046 100644
> --- a/include/linux/soc/mediatek/mtk-cmdq.h
> +++ b/include/linux/soc/mediatek/mtk-cmdq.h
> @@ -12,6 +12,7 @@
> #include <linux/timer.h>
>
> #define CMDQ_NO_TIMEOUT 0xffffffffu
> +#define CMDQ_SPR_TEMP 0
>
> struct cmdq_pkt;
>
> @@ -103,6 +104,18 @@ int cmdq_pkt_write_mask(struct cmdq_pkt *pkt, u8 subsys,
> u16 offset, u32 value, u32 mask);
>
> /**
> + * cmdq_pkt_write_s() - append write_s command with mask to the CMDQ packet
> + * @pkt: the CMDQ packet
> + * @addr: the physical address of register or dma
> + * @value: the specified target value
> + * @mask: the specified target mask
> + *
> + * Return: 0 for success; else the error code is returned
> + */
> +int cmdq_pkt_write_s(struct cmdq_pkt *pkt, dma_addr_t addr,
> + u32 value, u32 mask);
You have an API cmdq_pkt_read_s() which read data into gce internal
register, so I expect that cmdq_pkt_write_s() is an API which write data
from gce internal register, the expected prototype is
int cmdq_pkt_write_s(struct cmdq_pkt *pkt, phys_addr_t addr, u16
reg_idx);
Your version would confuse the user because you hide the internal
register parameter. If you want to provide this service, I would like
you to change the function name so that user would not be confused and
easily to understand what you want to do in this function.
Another choice is: cmdq_pkt_write_s() is implemented in my definition,
and user could call cmdq_pkt_assign() and cmdq_pkt_write_s() to achieve
this function.
Regards,
CK
> +
> +/**
> * cmdq_pkt_wfe() - append wait for event command to the CMDQ packet
> * @pkt: the CMDQ packet
> * @event: the desired event type to "wait and CLEAR"
next prev parent reply other threads:[~2019-11-22 8:56 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-11-21 9:12 support gce on mt6779 platform Dennis YC Hsieh
2019-11-21 9:12 ` [PATCH v1 01/12] dt-binding: gce: add gce header file for mt6779 Dennis YC Hsieh
2019-11-21 9:12 ` [PATCH v1 02/12] mailbox: cmdq: variablize address shift in platform Dennis YC Hsieh
2019-11-21 9:12 ` [PATCH v1 03/12] mailbox: cmdq: support mt6779 gce platform definition Dennis YC Hsieh
2019-11-21 9:12 ` [PATCH v1 04/12] mailbox: mediatek: cmdq: clear task in channel before shutdown Dennis YC Hsieh
2019-11-21 9:12 ` [PATCH v1 05/12] arm64: dts: add gce node for mt6779 Dennis YC Hsieh
2019-11-21 9:12 ` [PATCH v1 06/12] soc: mediatek: cmdq: add assign function Dennis YC Hsieh
2019-11-25 5:35 ` CK Hu
2019-11-25 7:41 ` Dennis-YC Hsieh
2019-11-21 9:12 ` [PATCH v1 07/12] soc: mediatek: cmdq: add write_s function Dennis YC Hsieh
2019-11-22 8:56 ` CK Hu [this message]
2019-11-22 10:11 ` Dennis-YC Hsieh
2019-11-25 2:08 ` CK Hu
2019-11-25 7:39 ` Dennis-YC Hsieh
2019-11-21 9:12 ` [PATCH v1 08/12] soc: mediatek: cmdq: add read_s function Dennis YC Hsieh
2019-11-21 9:12 ` [PATCH v1 09/12] soc: mediatek: cmdq: add mem move function Dennis YC Hsieh
2019-11-21 9:12 ` [PATCH v1 10/12] soc: mediatek: cmdq: add loop function Dennis YC Hsieh
2019-11-22 9:46 ` CK Hu
2019-11-22 10:29 ` Dennis-YC Hsieh
2019-11-25 1:35 ` CK Hu
2019-11-25 7:36 ` Dennis-YC Hsieh
2019-11-21 9:12 ` [PATCH v1 11/12] soc: mediatek: cmdq: add wait no clear event function Dennis YC Hsieh
2019-11-21 9:12 ` [PATCH v1 12/12] soc: mediatek: cmdq: add set " Dennis YC Hsieh
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