From: "周琰杰 (Zhou Yanjie)" <zhouyanjie@wanyeetech.com>
To: linux-mips@vger.kernel.org
Cc: linux-kernel@vger.kernel.org, dmaengine@vger.kernel.org,
devicetree@vger.kernel.org, robh+dt@kernel.org,
paul.burton@mips.com, paulburton@kernel.org,
mark.rutland@arm.com, paul@crapouillou.net, vkoul@kernel.org,
Zubair.Kakakhel@imgtec.com, dan.j.williams@intel.com,
sernia.zhou@foxmail.com, zhenwenjin@gmail.com, 2374286503@qq.com
Subject: [PATCH 1/2] dt-bindings: dmaengine: Add X1830 bindings.
Date: Tue, 17 Dec 2019 21:58:59 +0800 [thread overview]
Message-ID: <1576591140-125668-3-git-send-email-zhouyanjie@wanyeetech.com> (raw)
In-Reply-To: <1576591140-125668-1-git-send-email-zhouyanjie@wanyeetech.com>
Add the dmaengine bindings for the X1830 Soc from Ingenic.
Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com>
---
.../devicetree/bindings/dma/jz4780-dma.txt | 6 ++--
include/dt-bindings/dma/x1830-dma.h | 39 ++++++++++++++++++++++
2 files changed, 43 insertions(+), 2 deletions(-)
create mode 100644 include/dt-bindings/dma/x1830-dma.h
diff --git a/Documentation/devicetree/bindings/dma/jz4780-dma.txt b/Documentation/devicetree/bindings/dma/jz4780-dma.txt
index ec89782..3459e77 100644
--- a/Documentation/devicetree/bindings/dma/jz4780-dma.txt
+++ b/Documentation/devicetree/bindings/dma/jz4780-dma.txt
@@ -1,4 +1,4 @@
-* Ingenic JZ4780 DMA Controller
+* Ingenic XBurst DMA Controller
Required properties:
@@ -8,10 +8,12 @@ Required properties:
* ingenic,jz4770-dma
* ingenic,jz4780-dma
* ingenic,x1000-dma
+ * ingenic,x1830-dma
- reg: Should contain the DMA channel registers location and length, followed
by the DMA controller registers location and length.
- interrupts: Should contain the interrupt specifier of the DMA controller.
-- clocks: Should contain a clock specifier for the JZ4780/X1000 PDMA clock.
+- clocks: Should contain a clock specifier for the JZ4780/X1000/X1830 PDMA
+ clock.
- #dma-cells: Must be <2>. Number of integer cells in the dmas property of
DMA clients (see below).
diff --git a/include/dt-bindings/dma/x1830-dma.h b/include/dt-bindings/dma/x1830-dma.h
new file mode 100644
index 00000000..35bcb89
--- /dev/null
+++ b/include/dt-bindings/dma/x1830-dma.h
@@ -0,0 +1,39 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/*
+ * This header provides macros for X1830 DMA bindings.
+ *
+ * Copyright (c) 2019 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com>
+ */
+
+#ifndef __DT_BINDINGS_DMA_X1830_DMA_H__
+#define __DT_BINDINGS_DMA_X1830_DMA_H__
+
+/*
+ * Request type numbers for the X1830 DMA controller (written to the DRTn
+ * register for the channel).
+ */
+#define X1830_DMA_I2S0_TX 0x6
+#define X1830_DMA_I2S0_RX 0x7
+#define X1830_DMA_AUTO 0x8
+#define X1830_DMA_SADC_RX 0x9
+#define X1830_DMA_UART1_TX 0x12
+#define X1830_DMA_UART1_RX 0x13
+#define X1830_DMA_UART0_TX 0x14
+#define X1830_DMA_UART0_RX 0x15
+#define X1830_DMA_SSI0_TX 0x16
+#define X1830_DMA_SSI0_RX 0x17
+#define X1830_DMA_SSI1_TX 0x18
+#define X1830_DMA_SSI1_RX 0x19
+#define X1830_DMA_MSC0_TX 0x1a
+#define X1830_DMA_MSC0_RX 0x1b
+#define X1830_DMA_MSC1_TX 0x1c
+#define X1830_DMA_MSC1_RX 0x1d
+#define X1830_DMA_DMIC_RX 0x21
+#define X1830_DMA_SMB0_TX 0x24
+#define X1830_DMA_SMB0_RX 0x25
+#define X1830_DMA_SMB1_TX 0x26
+#define X1830_DMA_SMB1_RX 0x27
+#define X1830_DMA_DES_TX 0x2e
+#define X1830_DMA_DES_RX 0x2f
+
+#endif /* __DT_BINDINGS_DMA_X1830_DMA_H__ */
--
2.7.4
next prev parent reply other threads:[~2019-12-17 13:59 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-12-17 13:58 Add dmaengine driver for X1830 周琰杰 (Zhou Yanjie)
2019-12-17 13:58 ` [PATCH 0/2] " 周琰杰 (Zhou Yanjie)
2019-12-17 13:58 ` 周琰杰 (Zhou Yanjie) [this message]
2019-12-26 22:30 ` [PATCH 1/2] dt-bindings: dmaengine: Add X1830 bindings Rob Herring
2019-12-17 13:59 ` [PATCH 2/2] dmaengine: JZ4780: Add support for the X1830 周琰杰 (Zhou Yanjie)
2019-12-23 7:43 ` Add dmaengine driver for X1830 Vinod Koul
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