From: Grzegorz Jaszczyk <grzegorz.jaszczyk@linaro.org>
To: tglx@linutronix.de, jason@lakedaemon.net, maz@kernel.org, s-anna@ti.com
Cc: grzegorz.jaszczyk@linaro.org, robh+dt@kernel.org,
lee.jones@linaro.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-omap@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, david@lechnology.com,
wmills@ti.com, praneeth@ti.com
Subject: [PATCH v4 3/5] irqchip/irq-pruss-intc: Add logic for handling reserved interrupts
Date: Tue, 28 Jul 2020 11:18:36 +0200 [thread overview]
Message-ID: <1595927918-19845-4-git-send-email-grzegorz.jaszczyk@linaro.org> (raw)
In-Reply-To: <1595927918-19845-1-git-send-email-grzegorz.jaszczyk@linaro.org>
From: Suman Anna <s-anna@ti.com>
The PRUSS INTC has a fixed number of output interrupt lines that are
connected to a number of processors or other PRUSS instances or other
devices (like DMA) on the SoC. The output interrupt lines 2 through 9
are usually connected to the main Arm host processor and are referred
to as host interrupts 0 through 7 from ARM/MPU perspective.
All of these 8 host interrupts are not always exclusively connected
to the Arm interrupt controller. Some SoCs have some interrupt lines
not connected to the Arm interrupt controller at all, while a few others
have the interrupt lines connected to multiple processors in which they
need to be partitioned as per SoC integration needs. For example, AM437x
and 66AK2G SoCs have 2 PRUSS instances each and have the host interrupt 5
connected to the other PRUSS, while AM335x has host interrupt 0 shared
between MPU and TSC_ADC and host interrupts 6 & 7 shared between MPU and
a DMA controller.
Add logic to the PRUSS INTC driver to ignore both these shared and
invalid interrupts.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Grzegorz Jaszczyk <grzegorz.jaszczyk@linaro.org>
---
v3->v4:
- Due to changes in DT bindings which converts irqs-reserved
property from uint8-array to bitmask requested by Rob introduce
relevant changes in the driver.
- Merge the irqs-reserved and irqs-shared to one property since they
can be handled by one logic (relevant change was introduced to DT
binding).
- Update commit message.
v2->v3:
- Extra checks for (intc->irqs[i]) in error/remove path was moved from
"irqchip/irq-pruss-intc: Add a PRUSS irqchip driver for PRUSS
interrupts" to this patch
v1->v2:
- https://patchwork.kernel.org/patch/11069757/
---
drivers/irqchip/irq-pruss-intc.c | 29 ++++++++++++++++++++++++-----
1 file changed, 24 insertions(+), 5 deletions(-)
diff --git a/drivers/irqchip/irq-pruss-intc.c b/drivers/irqchip/irq-pruss-intc.c
index 45b966a..cf9a59b 100644
--- a/drivers/irqchip/irq-pruss-intc.c
+++ b/drivers/irqchip/irq-pruss-intc.c
@@ -474,7 +474,7 @@ static int pruss_intc_probe(struct platform_device *pdev)
struct pruss_intc *intc;
struct pruss_host_irq_data *host_data[MAX_NUM_HOST_IRQS] = { NULL };
int i, irq, ret;
- u8 max_system_events;
+ u8 max_system_events, invalid_intr = 0;
data = of_device_get_match_data(dev);
if (!data)
@@ -496,6 +496,16 @@ static int pruss_intc_probe(struct platform_device *pdev)
return PTR_ERR(intc->base);
}
+ ret = of_property_read_u8(dev->of_node, "ti,irqs-reserved",
+ &invalid_intr);
+
+ /*
+ * The irqs-reserved is used only for some SoC's therefore not having
+ * this property is still valid
+ */
+ if (ret < 0 && ret != -EINVAL)
+ return ret;
+
pruss_intc_init(intc);
mutex_init(&intc->lock);
@@ -506,6 +516,9 @@ static int pruss_intc_probe(struct platform_device *pdev)
return -ENOMEM;
for (i = 0; i < MAX_NUM_HOST_IRQS; i++) {
+ if (invalid_intr & BIT(i))
+ continue;
+
irq = platform_get_irq_byname(pdev, irq_names[i]);
if (irq <= 0) {
dev_err(dev, "platform_get_irq_byname failed for %s : %d\n",
@@ -533,8 +546,11 @@ static int pruss_intc_probe(struct platform_device *pdev)
return 0;
fail_irq:
- while (--i >= 0)
- irq_set_chained_handler_and_data(intc->irqs[i], NULL, NULL);
+ while (--i >= 0) {
+ if (intc->irqs[i])
+ irq_set_chained_handler_and_data(intc->irqs[i], NULL,
+ NULL);
+ }
irq_domain_remove(intc->domain);
@@ -548,8 +564,11 @@ static int pruss_intc_remove(struct platform_device *pdev)
unsigned int hwirq;
int i;
- for (i = 0; i < MAX_NUM_HOST_IRQS; i++)
- irq_set_chained_handler_and_data(intc->irqs[i], NULL, NULL);
+ for (i = 0; i < MAX_NUM_HOST_IRQS; i++) {
+ if (intc->irqs[i])
+ irq_set_chained_handler_and_data(intc->irqs[i], NULL,
+ NULL);
+ }
for (hwirq = 0; hwirq < max_system_events; hwirq++)
irq_dispose_mapping(irq_find_mapping(intc->domain, hwirq));
--
2.7.4
next prev parent reply other threads:[~2020-07-28 9:20 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-07-28 9:18 [PATCH v4 0/5] Add TI PRUSS Local Interrupt Controller IRQChip driver Grzegorz Jaszczyk
2020-07-28 9:18 ` [PATCH v4 1/5] dt-bindings: irqchip: Add PRU-ICSS interrupt controller bindings Grzegorz Jaszczyk
2020-07-29 17:34 ` David Lechner
2020-07-31 11:48 ` Grzegorz Jaszczyk
2020-07-31 14:09 ` David Lechner
2020-07-31 14:16 ` Grzegorz Jaszczyk
2020-07-31 14:35 ` Suman Anna
2020-07-31 21:09 ` Rob Herring
2020-08-02 21:49 ` Grzegorz Jaszczyk
2020-07-28 9:18 ` [PATCH v4 2/5] irqchip/irq-pruss-intc: Add a PRUSS irqchip driver for PRUSS interrupts Grzegorz Jaszczyk
2020-07-29 18:43 ` David Lechner
2020-07-31 11:57 ` Grzegorz Jaszczyk
2020-07-28 9:18 ` Grzegorz Jaszczyk [this message]
2020-07-28 16:37 ` [PATCH v4 3/5] irqchip/irq-pruss-intc: Add logic for handling reserved interrupts Marc Zyngier
2020-07-28 22:23 ` Grzegorz Jaszczyk
2020-07-29 18:48 ` David Lechner
2020-07-31 14:11 ` Grzegorz Jaszczyk
2020-07-28 9:18 ` [PATCH v4 4/5] irqchip/irq-pruss-intc: Implement irq_{get,set}_irqchip_state ops Grzegorz Jaszczyk
2020-07-29 19:23 ` David Lechner
2020-07-31 12:28 ` Grzegorz Jaszczyk
2020-07-31 15:59 ` David Lechner
2020-07-28 9:18 ` [PATCH v4 5/5] irqchip/irq-pruss-intc: Add support for ICSSG INTC on K3 SoCs Grzegorz Jaszczyk
2020-07-29 19:28 ` David Lechner
2020-07-31 12:32 ` Grzegorz Jaszczyk
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1595927918-19845-4-git-send-email-grzegorz.jaszczyk@linaro.org \
--to=grzegorz.jaszczyk@linaro.org \
--cc=david@lechnology.com \
--cc=devicetree@vger.kernel.org \
--cc=jason@lakedaemon.net \
--cc=lee.jones@linaro.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-omap@vger.kernel.org \
--cc=maz@kernel.org \
--cc=praneeth@ti.com \
--cc=robh+dt@kernel.org \
--cc=s-anna@ti.com \
--cc=tglx@linutronix.de \
--cc=wmills@ti.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).