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From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
To: geert+renesas@glider.be, magnus.damm@gmail.com, robh+dt@kernel.org
Cc: linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org,
	Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Subject: [PATCH 07/14] dt-bindings: clock: Add r8a77961 CPG Core Clock Definitions
Date: Mon,  7 Sep 2020 18:19:43 +0900	[thread overview]
Message-ID: <1599470390-29719-8-git-send-email-yoshihiro.shimoda.uh@renesas.com> (raw)
In-Reply-To: <1599470390-29719-1-git-send-email-yoshihiro.shimoda.uh@renesas.com>

Add all Clock Pulse Generator Core Clock Outputs for the Renesas R-Car
V3U (R8A779A0) SoC.

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
---
 include/dt-bindings/clock/r8a779a0-cpg-mssr.h | 63 +++++++++++++++++++++++++++
 1 file changed, 63 insertions(+)
 create mode 100644 include/dt-bindings/clock/r8a779a0-cpg-mssr.h

diff --git a/include/dt-bindings/clock/r8a779a0-cpg-mssr.h b/include/dt-bindings/clock/r8a779a0-cpg-mssr.h
new file mode 100644
index 0000000..9ed14ea
--- /dev/null
+++ b/include/dt-bindings/clock/r8a779a0-cpg-mssr.h
@@ -0,0 +1,63 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2020 Renesas Electronics Corp.
+ */
+#ifndef __DT_BINDINGS_CLOCK_R8A779A0_CPG_MSSR_H__
+#define __DT_BINDINGS_CLOCK_R8A779A0_CPG_MSSR_H__
+
+#include <dt-bindings/clock/renesas-cpg-mssr.h>
+
+/* r8a779A0 CPG Core Clocks */
+#define R8A779A0_CLK_Z0			0
+#define R8A779A0_CLK_ZX			1
+#define R8A779A0_CLK_Z1			2
+#define R8A779A0_CLK_ZR			3
+#define R8A779A0_CLK_ZS			4
+#define R8A779A0_CLK_ZT			5
+#define R8A779A0_CLK_ZTR		6
+#define R8A779A0_CLK_S1			7
+#define R8A779A0_CLK_S3			8
+#define R8A779A0_CLK_S1D1		9
+#define R8A779A0_CLK_S1D2		10
+#define R8A779A0_CLK_S1D4		11
+#define R8A779A0_CLK_S1D8		12
+#define R8A779A0_CLK_S1D12		13
+#define R8A779A0_CLK_S2D1		14
+#define R8A779A0_CLK_S2D2		15
+#define R8A779A0_CLK_S2D4		16
+#define R8A779A0_CLK_S3D1		17
+#define R8A779A0_CLK_S3D2		18
+#define R8A779A0_CLK_S3D4		19
+#define R8A779A0_CLK_LB			20
+#define R8A779A0_CLK_CP			21
+#define R8A779A0_CLK_CL			22
+#define R8A779A0_CLK_CL16MCK		23
+#define R8A779A0_CLK_ZB30		24
+#define R8A779A0_CLK_ZB30D2		25
+#define R8A779A0_CLK_ZB30D4		26
+#define R8A779A0_CLK_ZB31		27
+#define R8A779A0_CLK_ZB31D2		28
+#define R8A779A0_CLK_ZB31D4		29
+#define R8A779A0_CLK_SD0H		30
+#define R8A779A0_CLK_SD0		31
+#define R8A779A0_CLK_RPC		32
+#define R8A779A0_CLK_RPCD2		33
+#define R8A779A0_CLK_MSO		34
+#define R8A779A0_CLK_CANFD		35
+#define R8A779A0_CLK_CSI0		36
+#define R8A779A0_CLK_FRAY		37
+#define R8A779A0_CLK_POST		38
+#define R8A779A0_CLK_POST2		39
+#define R8A779A0_CLK_POST3		40
+#define R8A779A0_CLK_DSI		41
+#define R8A779A0_CLK_VIP		42
+#define R8A779A0_CLK_ADGH		43
+#define R8A779A0_CLK_CNNDSP		44
+#define R8A779A0_CLK_ICU		45
+#define R8A779A0_CLK_ICUD2		46
+#define R8A779A0_CLK_VCBUS		47
+#define R8A779A0_CLK_CBFUSA		48
+#define R8A779A0_CLK_RCLK		49
+#define R8A779A0_CLK_OSCCLK		50
+
+#endif /* __DT_BINDINGS_CLOCK_R8A779A0_CPG_MSSR_H__ */
-- 
2.7.4


  parent reply	other threads:[~2020-09-07  9:20 UTC|newest]

Thread overview: 49+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-09-07  9:19 [PATCH 00/14] treewide: add initial support for R-Car V3U Yoshihiro Shimoda
2020-09-07  9:19 ` [PATCH 01/14] dt-bindings: arm: renesas: Document R-Car V3U SoC DT bindings Yoshihiro Shimoda
2020-09-07 15:17   ` Geert Uytterhoeven
2020-09-07  9:19 ` [PATCH 02/14] dt-bindings: arm: renesas: Document Renesas Falcon boards Yoshihiro Shimoda
2020-09-07 15:31   ` Geert Uytterhoeven
2020-09-08  1:01     ` Yoshihiro Shimoda
2020-09-08  7:11       ` Geert Uytterhoeven
2020-09-08  8:45         ` Yoshihiro Shimoda
2020-09-10  9:10           ` Geert Uytterhoeven
2020-09-10  9:12             ` Yoshihiro Shimoda
2020-09-07  9:19 ` [PATCH 03/14] dt-bindings: power: renesas,rcar-sysc: Document r8a779a0 SYSC binding Yoshihiro Shimoda
2020-09-08  8:08   ` Geert Uytterhoeven
2020-09-07  9:19 ` [PATCH 04/14] dt-bindings: power: Add r8a779a0 SYSC power domain definitions Yoshihiro Shimoda
2020-09-08  8:39   ` Geert Uytterhoeven
2020-09-08  8:48     ` Yoshihiro Shimoda
2020-09-07  9:19 ` [PATCH 05/14] dt-bindings: reset: renesas,rst: Document r8a779a0 reset module Yoshihiro Shimoda
2020-09-08  8:46   ` Geert Uytterhoeven
2020-09-07  9:19 ` [PATCH 06/14] dt-bindings: clock: renesas,cpg-mssr: Document r8a779a0 Yoshihiro Shimoda
2020-09-08  9:23   ` Geert Uytterhoeven
2020-09-08 17:17     ` Geert Uytterhoeven
2020-09-15 15:42   ` Rob Herring
2020-09-07  9:19 ` Yoshihiro Shimoda [this message]
2020-09-08  9:23   ` [PATCH 07/14] dt-bindings: clock: Add r8a77961 CPG Core Clock Definitions Geert Uytterhoeven
2020-09-08  9:38     ` Geert Uytterhoeven
2020-09-09  1:05     ` Yoshihiro Shimoda
2020-09-07  9:19 ` [PATCH 08/14] dt-bindings: serial: renesas,scif: Document r8a779a0 bindings Yoshihiro Shimoda
2020-09-08  9:39   ` Geert Uytterhoeven
2020-09-15 15:43   ` Rob Herring
2020-09-07  9:19 ` [PATCH 09/14] soc: renesas: identify R-Car V3U Yoshihiro Shimoda
2020-09-08  9:43   ` Geert Uytterhoeven
2020-09-07  9:19 ` [PATCH 10/14] soc: renesas: r8a779a0-sysc: Add r8a779a0 support Yoshihiro Shimoda
2020-09-08 11:20   ` Geert Uytterhoeven
2020-09-09 12:45     ` Yoshihiro Shimoda
2020-09-07  9:19 ` [PATCH 11/14] soc: renesas: rcar-rst: Add support for R-Car V3U Yoshihiro Shimoda
2020-09-08 11:36   ` Geert Uytterhoeven
2020-09-10  4:45     ` Yoshihiro Shimoda
2020-09-10  6:28       ` Geert Uytterhoeven
2020-09-07  9:19 ` [PATCH 12/14] clk: renesas: cpg-mssr: " Yoshihiro Shimoda
2020-09-08 15:22   ` Geert Uytterhoeven
2020-09-09  2:52     ` Yoshihiro Shimoda
2020-09-09  6:47       ` Geert Uytterhoeven
2020-09-07  9:19 ` [PATCH 13/14] arm64: dts: renesas: Add Renesas R8A779A0 SoC support Yoshihiro Shimoda
2020-09-08 17:15   ` Geert Uytterhoeven
2020-09-10 11:03     ` Yoshihiro Shimoda
2020-09-07  9:19 ` [PATCH 14/14] arm64: dts: renesas: Add Renesas Falcon boards support Yoshihiro Shimoda
2020-09-08 17:20   ` Geert Uytterhoeven
2020-09-10 11:04     ` Yoshihiro Shimoda
2020-09-10 11:13       ` Geert Uytterhoeven
2020-09-10 11:24         ` Yoshihiro Shimoda

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