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From: Wendy Liang <wendy.liang@xilinx.com>
To: <robh+dt@kernel.org>, <michal.simek@xilinx.com>, <arnd@arndb.de>,
	<gregkh@linuxfoundation.org>, <sumit.semwal@linaro.org>,
	<christian.koenig@amd.com>, <derek.kiernan@xilinx.com>,
	<dragan.cvetic@xilinx.com>, <rajan.vaja@xilinx.com>,
	<tejas.patel@xilinx.com>, <manish.narani@xilinx.com>,
	<ravi.patel@xilinx.com>
Cc: <devicetree@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-kernel@vger.kernel.org>, <linux-media@vger.kernel.org>,
	<dri-devel@lists.freedesktop.org>,
	Nishad Saraf <nishad.saraf@xilinx.com>,
	Wendy Liang <wendy.liang@xilinx.com>
Subject: [PATCH v3 7/9] misc: xilinx-ai-engine: Add support to request device management services
Date: Sun, 29 Nov 2020 23:48:23 -0800	[thread overview]
Message-ID: <1606722505-16194-8-git-send-email-wendy.liang@xilinx.com> (raw)
In-Reply-To: <1606722505-16194-1-git-send-email-wendy.liang@xilinx.com>

From: Nishad Saraf <nishad.saraf@xilinx.com>

Platform management services like device control, resets, power
management, etc. are provided by Platform, Loader and Manager(PLM)
through firmware driver APIs. For requesting some of these services,
this change reads AI Engine platform management node ID from DT node.
Some other features like clearing interrupts in the NoC interconnect
might only be valid for particular silicon revisions. For supporting
such silicon specific features, AI Engine driver will query and store
this information in device instance. While at it, this change makes
EEMI operations accessible to all the other source files in the
driver.

Signed-off-by: Nishad Saraf <nishad.saraf@xilinx.com>
Signed-off-by: Wendy Liang <wendy.liang@xilinx.com>
---
 drivers/misc/xilinx-ai-engine/ai-engine-dev.c      | 25 +++++++++++++++++++++-
 drivers/misc/xilinx-ai-engine/ai-engine-internal.h |  6 ++++++
 2 files changed, 30 insertions(+), 1 deletion(-)

diff --git a/drivers/misc/xilinx-ai-engine/ai-engine-dev.c b/drivers/misc/xilinx-ai-engine/ai-engine-dev.c
index 43f4933..51c3a4f 100644
--- a/drivers/misc/xilinx-ai-engine/ai-engine-dev.c
+++ b/drivers/misc/xilinx-ai-engine/ai-engine-dev.c
@@ -11,6 +11,7 @@
 #include <linux/device.h>
 #include <linux/dma-mapping.h>
 #include <linux/file.h>
+#include <linux/firmware/xlnx-zynqmp.h>
 #include <linux/fs.h>
 #include <linux/idr.h>
 #include <linux/kernel.h>
@@ -26,7 +27,8 @@
 
 #include "ai-engine-internal.h"
 
-#define AIE_DEV_MAX	(MINORMASK + 1)
+#define AIE_DEV_MAX			(MINORMASK + 1)
+#define VERSAL_SILICON_REV_MASK		GENMASK(31, 28)
 
 static dev_t aie_major;
 struct class *aie_class;
@@ -322,6 +324,7 @@ static int xilinx_ai_engine_probe(struct platform_device *pdev)
 {
 	struct aie_device *adev;
 	struct device *dev;
+	u32 idcode, version, pm_reg[2];
 	int ret;
 
 	adev = devm_kzalloc(&pdev->dev, sizeof(*adev), GFP_KERNEL);
@@ -349,6 +352,26 @@ static int xilinx_ai_engine_probe(struct platform_device *pdev)
 		return ret;
 	}
 
+	/*
+	 * AI Engine platform management node ID is required for requesting
+	 * services from firmware driver.
+	 */
+	ret = of_property_read_u32_array(pdev->dev.of_node, "power-domains",
+					 pm_reg, ARRAY_SIZE(pm_reg));
+	if (ret < 0) {
+		dev_err(&pdev->dev,
+			"Failed to read power management information\n");
+		return ret;
+	}
+	adev->pm_node_id = pm_reg[1];
+
+	ret = zynqmp_pm_get_chipid(&idcode, &version);
+	if (ret < 0) {
+		dev_err(&pdev->dev, "Failed to get chip ID\n");
+		return ret;
+	}
+	adev->version = FIELD_GET(VERSAL_SILICON_REV_MASK, idcode);
+
 	dev = &adev->dev;
 	device_initialize(dev);
 	dev->class = aie_class;
diff --git a/drivers/misc/xilinx-ai-engine/ai-engine-internal.h b/drivers/misc/xilinx-ai-engine/ai-engine-internal.h
index 131d22a..b21b7025 100644
--- a/drivers/misc/xilinx-ai-engine/ai-engine-internal.h
+++ b/drivers/misc/xilinx-ai-engine/ai-engine-internal.h
@@ -41,6 +41,10 @@
 #define AIE_REGS_ATTR_PERM_MASK		GENMASK(15, \
 						AIE_REGS_ATTR_PERM_SHIFT)
 
+/* Silicon Engineering Sample(ES) revision ID */
+#define VERSAL_ES1_REV_ID		0x0
+#define VERSAL_ES2_REV_ID		0x1
+
 /**
  * struct aie_tile_regs - contiguous range of AI engine register
  *			  within an AI engine tile
@@ -173,6 +177,7 @@ struct aie_resource {
  *	      while columns are occupied by partitions.
  * @num_kernel_regs: number of kernel only registers range
  * @version: AI engine device version
+ * @pm_node_id: AI Engine platform management node ID
  */
 struct aie_device {
 	struct list_head partitions;
@@ -193,6 +198,7 @@ struct aie_device {
 	u32 row_shift;
 	u32 num_kernel_regs;
 	int version;
+	u32 pm_node_id;
 };
 
 /**
-- 
2.7.4


  parent reply	other threads:[~2020-11-30  7:50 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-11-30  7:48 [PATCH v3 0/9] Xilinx AI engine kernel driver Wendy Liang
2020-11-30  7:48 ` [PATCH v3 1/9] dt-binding: soc: xilinx: ai-engine: Add AI engine binding Wendy Liang
2020-12-08 23:41   ` Rob Herring
2020-12-09 19:52     ` Jiaying Liang
2020-11-30  7:48 ` [PATCH v3 2/9] misc: Add Xilinx AI engine device driver Wendy Liang
2020-11-30  7:48 ` [PATCH v3 3/9] misc: xilinx-ai-engine: Implement AI engine cleanup sequence Wendy Liang
2020-11-30  7:48 ` [PATCH v3 4/9] misc: xilinx-ai-engine: expose AI engine tile memories to userspace Wendy Liang
2020-11-30  7:48 ` [PATCH v3 5/9] misc: xilinx-ai-engine: add setting shim dma bd operation Wendy Liang
2020-11-30  7:48 ` [PATCH v3 6/9] misc: xilinx-ai-engine: add request and release tiles Wendy Liang
2020-11-30  7:48 ` Wendy Liang [this message]
2020-11-30  7:48 ` [PATCH v3 8/9] firmware: xilinx: Add IOCTL support for AIE ISR Clear Wendy Liang
2020-11-30  7:48 ` [PATCH v3 9/9] misc: xilinx-ai-engine: Add support for servicing error interrupts Wendy Liang
2020-12-11 19:03 ` [PATCH v3 0/9] Xilinx AI engine kernel driver Alex Deucher
2020-12-11 19:39   ` Daniel Vetter
2020-12-15  0:24     ` Jiaying Liang
2020-12-15  9:49       ` Daniel Vetter
2020-12-15 15:23       ` Alex Deucher
2020-12-17  8:40         ` Jiaying Liang
2020-12-17 10:06           ` Daniel Vetter

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