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Subject: Re: [PATCH v1 4/6] clk: qcom: Add graphics clock controller driver for SC7280
From:   Stephen Boyd <sboyd@kernel.org>
Cc:     Rajendra Nayak <rnayak@codeaurora.org>,
        linux-arm-msm@vger.kernel.org, linux-soc@vger.kernel.org,
        linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org,
        devicetree@vger.kernel.org, robh@kernel.org, robh+dt@kernel.org,
        Taniya Das <tdas@codeaurora.org>
To:     Michael Turquette <mturquette@baylibre.com>,
        Taniya Das <tdas@codeaurora.org>
Date:   Thu, 08 Apr 2021 00:22:25 -0700
Message-ID: <161786654585.3790633.12597782416303763853@swboyd.mtv.corp.google.com>
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Quoting Taniya Das (2021-03-16 18:22:20)
> +static struct clk_regmap_div gpu_cc_hub_ahb_div_clk_src =3D {
> +       .reg =3D 0x11c0,
> +       .shift =3D 0,
> +       .width =3D 4,
> +       .clkr.hw.init =3D &(struct clk_init_data) {
> +               .name =3D "gpu_cc_hub_ahb_div_clk_src",
> +               .parent_data =3D &(const struct clk_parent_data){
> +                       .hw =3D &gpu_cc_hub_clk_src.clkr.hw,

Can you follow what Dmitry has done and use .hws instead of
clk_parent_data when the whole array is clk_hw pointers?

> +               },
> +               .num_parents =3D 1,
> +               .flags =3D CLK_SET_RATE_PARENT,
> +               .ops =3D &clk_regmap_div_ro_ops,
> +       },
> +};
> +