From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E1C4AC43217 for ; Thu, 23 Sep 2021 12:16:56 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id BB49861107 for ; Thu, 23 Sep 2021 12:16:56 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240831AbhIWMS0 (ORCPT ); Thu, 23 Sep 2021 08:18:26 -0400 Received: from alexa-out.qualcomm.com ([129.46.98.28]:64801 "EHLO alexa-out.qualcomm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240733AbhIWMSY (ORCPT ); Thu, 23 Sep 2021 08:18:24 -0400 Received: from ironmsg07-lv.qualcomm.com ([10.47.202.151]) by alexa-out.qualcomm.com with ESMTP; 23 Sep 2021 05:16:49 -0700 X-QCInternal: smtphost Received: from ironmsg01-blr.qualcomm.com ([10.86.208.130]) by ironmsg07-lv.qualcomm.com with ESMTP/TLS/AES256-SHA; 23 Sep 2021 05:16:47 -0700 X-QCInternal: smtphost Received: from rajpat-linux.qualcomm.com ([10.206.21.0]) by ironmsg01-blr.qualcomm.com with ESMTP; 23 Sep 2021 17:46:30 +0530 Received: by rajpat-linux.qualcomm.com (Postfix, from userid 2344945) id 98F122160E; Thu, 23 Sep 2021 17:46:29 +0530 (IST) From: Rajesh Patil To: Andy Gross , Bjorn Andersson , Rob Herring Cc: linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, rnayak@codeaurora.org, saiprakash.ranjan@codeaurora.org, msavaliy@qti.qualcomm.com, skakit@codeaurora.org, sboyd@kernel.org, mka@chromium.org, dianders@chromium.org, Rajesh Patil Subject: [PATCH V10 8/8] arm64: dts: sc7280: Add aliases for I2C and SPI Date: Thu, 23 Sep 2021 17:46:18 +0530 Message-Id: <1632399378-12229-9-git-send-email-rajpat@codeaurora.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1632399378-12229-1-git-send-email-rajpat@codeaurora.org> References: <1632399378-12229-1-git-send-email-rajpat@codeaurora.org> Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add aliases for i2c and spi for sc7280 soc. Signed-off-by: Rajesh Patil Reviewed-by: Stephen Boyd --- Change in V10: - No changes Changes in V9: - No changes Changes in V8: - No changes Changes in V7: - As per Stephen's comments, Sorted alias names for i2c and spi as per alphabet order Changes in V6: - As per Doug's comments, added aliases for i2c and spi arch/arm64/boot/dts/qcom/sc7280.dtsi | 32 ++++++++++++++++++++++++++++++++ 1 file changed, 32 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi index c26647a..e5fefd1 100644 --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi @@ -26,8 +26,40 @@ chosen { }; aliases { + i2c0 = &i2c0; + i2c1 = &i2c1; + i2c2 = &i2c2; + i2c3 = &i2c3; + i2c4 = &i2c4; + i2c5 = &i2c5; + i2c6 = &i2c6; + i2c7 = &i2c7; + i2c8 = &i2c8; + i2c9 = &i2c9; + i2c10 = &i2c10; + i2c11 = &i2c11; + i2c12 = &i2c12; + i2c13 = &i2c13; + i2c14 = &i2c14; + i2c15 = &i2c15; mmc1 = &sdhc_1; mmc2 = &sdhc_2; + spi0 = &spi0; + spi1 = &spi1; + spi2 = &spi2; + spi3 = &spi3; + spi4 = &spi4; + spi5 = &spi5; + spi6 = &spi6; + spi7 = &spi7; + spi8 = &spi8; + spi9 = &spi9; + spi10 = &spi10; + spi11 = &spi11; + spi12 = &spi12; + spi13 = &spi13; + spi14 = &spi14; + spi15 = &spi15; }; clocks { -- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation