From: Kishon Vijay Abraham I <kishon@ti.com>
To: Rob Herring <robh@kernel.org>, Nishanth Menon <nm@ti.com>
Cc: Lee Jones <lee.jones@linaro.org>,
Bjorn Helgaas <bhelgaas@google.com>,
Tero Kristo <t-kristo@ti.com>, Roger Quadros <rogerq@ti.com>,
<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<linux-pci@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH 8/8] arm64: dts: ti: k3-j721e-main: Fix PCIe maximum outbound regions
Date: Fri, 6 Nov 2020 20:40:33 +0530 [thread overview]
Message-ID: <1825b8dc-89c4-f5e6-69f2-4b0f6f3e5944@ti.com> (raw)
In-Reply-To: <20201105165331.GA55814@bogus>
Hi Rob,
On 05/11/20 10:23 pm, Rob Herring wrote:
> On Mon, Nov 02, 2020 at 10:41:37AM -0600, Nishanth Menon wrote:
>> On 15:41-20201102, Kishon Vijay Abraham I wrote:
>>> PCIe controller in J721E supports a maximum of 32 outbound regions.
>>> commit 4e5833884f66 ("arm64: dts: ti: k3-j721e-main: Add PCIe device tree
>>> nodes") incorrectly added maximum number of outbound regions to 16. Fix
>>> it here.
>>>
>>> Fixes: 4e5833884f66 ("arm64: dts: ti: k3-j721e-main: Add PCIe device tree nodes")
>>> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
>>> ---
>>> arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 8 ++++----
>>> 1 file changed, 4 insertions(+), 4 deletions(-)
>>>
>>> diff --git a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
>>> index e2a96b2c423c..61b533130ed1 100644
>>> --- a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
>>> +++ b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
>>> @@ -652,7 +652,7 @@
>>> power-domains = <&k3_pds 239 TI_SCI_PD_EXCLUSIVE>;
>>> clocks = <&k3_clks 239 1>;
>>> clock-names = "fck";
>>> - cdns,max-outbound-regions = <16>;
>>> + cdns,max-outbound-regions = <32>;
>
> Can this be made detectable instead? Write to region registers and check
> the write sticks? I'm doing this for the DWC controller.
>
> Or make the property optional with the default being the max (32).
okay, I'll make this an optional property and send a patch which removes
cdns,max-outbound-regions in k3-j721e-main.dtsi.
Thanks,
Kishon
prev parent reply other threads:[~2020-11-06 15:10 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-11-02 10:11 [PATCH 0/8] J7200: Add PCIe DT nodes to Enable PCIe Kishon Vijay Abraham I
2020-11-02 10:11 ` [PATCH 1/8] dt-bindings: mfd: ti,j721e-system-controller.yaml: Document "pcie-ctrl" Kishon Vijay Abraham I
2020-11-05 16:54 ` Rob Herring
2020-11-09 14:17 ` Kishon Vijay Abraham I
2020-11-02 10:11 ` [PATCH 2/8] dt-bindings: PCI: Add host mode dt-bindings for TI's J7200 SoC Kishon Vijay Abraham I
2020-11-05 16:56 ` Rob Herring
2020-11-02 10:11 ` [PATCH 3/8] dt-bindings: PCI: Add EP " Kishon Vijay Abraham I
2020-11-05 16:56 ` Rob Herring
2020-11-02 10:11 ` [PATCH 4/8] arm64: dts: ti: k3-j7200-main: Add DT for WIZ and SERDES Kishon Vijay Abraham I
2020-11-02 10:11 ` [PATCH 5/8] arm64: dts: ti: k3-j7200-main: Add PCIe device tree node Kishon Vijay Abraham I
2020-11-02 10:11 ` [PATCH 6/8] arm64: dts: ti: k3-j7200-common-proc-board: Enable SERDES0 Kishon Vijay Abraham I
2020-11-02 10:11 ` [PATCH 7/8] arm64: dts: ti: k3-j7200-common-proc-board: Enable PCIe Kishon Vijay Abraham I
2020-11-02 10:11 ` [PATCH 8/8] arm64: dts: ti: k3-j721e-main: Fix PCIe maximum outbound regions Kishon Vijay Abraham I
2020-11-02 16:41 ` Nishanth Menon
2020-11-03 2:18 ` Kishon Vijay Abraham I
2020-11-05 16:53 ` Rob Herring
2020-11-06 15:10 ` Kishon Vijay Abraham I [this message]
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