From: Michal Simek <michal.simek@xilinx.com>
To: Rajan Vaja <rajan.vaja@xilinx.com>,
mturquette@baylibre.com, sboyd@kernel.org, robh+dt@kernel.org,
mark.rutland@arm.com, michal.simek@xilinx.com,
jolly.shah@xilinx.com, m.tretter@pengutronix.de,
gustavo@embeddedor.com, tejas.patel@xilinx.com,
nava.manne@xilinx.com, mdf@kernel.org
Cc: linux-clk@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v3 0/6] clk: zynqmp: Extend and fix zynqmp clock driver
Date: Thu, 12 Dec 2019 16:20:16 +0100 [thread overview]
Message-ID: <19c5f918-7e00-75e4-10d1-53f0a30748b2@xilinx.com> (raw)
In-Reply-To: <1575527759-26452-1-git-send-email-rajan.vaja@xilinx.com>
On 05. 12. 19 7:35, Rajan Vaja wrote:
> ZynqMP clock driver can be used for Versal platform also. Add support
> for Versal platform in ZynqMP clock driver.
>
> Also this patch series fixes divider calculation and adds support for get
> maximum divider, clock with CLK_DIVIDER_POWER_OF_TWO flag and warn user if
> clock users are more than allowed.
>
> Rajan Vaja (5):
> dt-bindings: clock: Add bindings for versal clock driver
> clk: zynqmp: Extend driver for versal
> clk: zynqmp: Warn user if clock user are more than allowed
> clk: zynqmp: Add support for get max divider
> clk: zynqmp: Fix divider calculation
>
> Tejas Patel (1):
> clk: zynqmp: Add support for clock with CLK_DIVIDER_POWER_OF_TWO flag
>
> .../devicetree/bindings/clock/xlnx,versal-clk.yaml | 64 +++++++++++
> drivers/clk/zynqmp/clkc.c | 3 +-
> drivers/clk/zynqmp/divider.c | 118 +++++++++++++++++++-
> drivers/clk/zynqmp/pll.c | 6 +-
> drivers/firmware/xilinx/zynqmp.c | 2 +
> include/dt-bindings/clock/xlnx-versal-clk.h | 123 +++++++++++++++++++++
> include/linux/firmware/xlnx-zynqmp.h | 2 +
> 7 files changed, 310 insertions(+), 8 deletions(-)
> create mode 100644 Documentation/devicetree/bindings/clock/xlnx,versal-clk.yaml
> create mode 100644 include/dt-bindings/clock/xlnx-versal-clk.h
>
That firmware changes looks good. That's why feel free to add my
Acked-by: Michal Simek <michal.simek@xilinx.com>
to that patches.
If you want me to take it via my tree please let me know.
Thanks,
Michal
next prev parent reply other threads:[~2019-12-12 15:20 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-11-12 13:16 [PATCH 0/7] clk: zynqmp: Extend and fix zynqmp clock driver Rajan Vaja
2019-11-12 13:16 ` [PATCH 1/7] dt-bindings: clock: Add bindings for versal " Rajan Vaja
2019-11-12 22:51 ` Stephen Boyd
2019-11-18 17:30 ` Rob Herring
2019-11-12 13:16 ` [PATCH 2/7] clk: zynqmp: Extend driver for versal Rajan Vaja
2019-11-12 13:16 ` [PATCH 3/7] clk: zynqmp: Warn user if clock user are more than allowed Rajan Vaja
2019-11-21 14:31 ` Michael Tretter
2019-11-12 13:16 ` [PATCH 4/7] clk: zynqmp: Add support for get max divider Rajan Vaja
2019-11-21 14:33 ` Michael Tretter
2019-11-12 13:16 ` [PATCH 5/7] clk: zynqmp: Fix divider calculation Rajan Vaja
2019-11-12 13:16 ` [PATCH 6/7] clk: zynqmp: Add support for clock with CLK_DIVIDER_POWER_OF_TWO flag Rajan Vaja
2019-11-12 13:16 ` [PATCH 7/7] clk: zynqmp: Fix fractional clock check Rajan Vaja
2019-11-21 14:41 ` Michael Tretter
2019-11-22 9:43 ` [PATCH v2 0/6] clk: zynqmp: Extend and fix zynqmp clock driver Rajan Vaja
2019-11-22 9:43 ` [PATCH v2 1/6] dt-bindings: clock: Add bindings for versal " Rajan Vaja
2019-12-04 19:53 ` Rob Herring
2019-11-22 9:43 ` [PATCH v2 2/6] clk: zynqmp: Extend driver for versal Rajan Vaja
2019-11-22 9:43 ` [PATCH v2 3/6] clk: zynqmp: Warn user if clock user are more than allowed Rajan Vaja
2019-11-22 9:43 ` [PATCH v2 4/6] clk: zynqmp: Add support for get max divider Rajan Vaja
2019-11-22 9:43 ` [PATCH v2 5/6] clk: zynqmp: Fix divider calculation Rajan Vaja
2019-11-22 9:43 ` [PATCH v2 6/6] clk: zynqmp: Add support for clock with CLK_DIVIDER_POWER_OF_TWO flag Rajan Vaja
2019-12-05 6:35 ` [PATCH v3 0/6] clk: zynqmp: Extend and fix zynqmp clock driver Rajan Vaja
2019-12-05 6:35 ` [PATCH v3 1/6] dt-bindings: clock: Add bindings for versal " Rajan Vaja
2020-01-23 22:58 ` Stephen Boyd
2019-12-05 6:35 ` [PATCH v3 2/6] clk: zynqmp: Extend driver for versal Rajan Vaja
2020-01-23 22:58 ` Stephen Boyd
2019-12-05 6:35 ` [PATCH v3 3/6] clk: zynqmp: Warn user if clock user are more than allowed Rajan Vaja
2020-01-23 22:58 ` Stephen Boyd
2019-12-05 6:35 ` [PATCH v3 4/6] clk: zynqmp: Add support for get max divider Rajan Vaja
2020-01-23 22:58 ` Stephen Boyd
2019-12-05 6:35 ` [PATCH v3 5/6] clk: zynqmp: Fix divider calculation Rajan Vaja
2020-01-23 22:58 ` Stephen Boyd
2019-12-05 6:35 ` [PATCH v3 6/6] clk: zynqmp: Add support for clock with CLK_DIVIDER_POWER_OF_TWO flag Rajan Vaja
2020-01-23 22:59 ` Stephen Boyd
2019-12-12 15:20 ` Michal Simek [this message]
2020-01-16 11:41 ` [PATCH v3 0/6] clk: zynqmp: Extend and fix zynqmp clock driver Rajan Vaja
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