From: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
To: Joel Stanley <joel-U3u1mxZcP9KHXe+LvDLADg@public.gmane.org>
Cc: tglx-hfZtesqFncYOwBW4kG4KsQ@public.gmane.org,
jason-NLaQJdtUoK4Be96aLqz0jA@public.gmane.org,
marc.zyngier-5wv7dgnIgG8@public.gmane.org,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
jk-mnsaURCQ41sdnm+yROfE0A@public.gmane.org,
benh-XVmvHMARGAS8U2dJNN8I7kB+6BGkLq7r@public.gmane.org,
arnd-r2nGTMty4D4@public.gmane.org,
baruch-NswTu9S1W3P6gbPvEgmw2w@public.gmane.org
Subject: Re: [PATCH v2 1/2] doc/devicetree: Add Aspeed VIC bindings
Date: Wed, 11 May 2016 09:33:13 -0500 [thread overview]
Message-ID: <20160511143313.GA7426@rob-hp-laptop> (raw)
In-Reply-To: <1462802317-27086-2-git-send-email-joel-U3u1mxZcP9KHXe+LvDLADg@public.gmane.org>
On Mon, May 09, 2016 at 11:28:36PM +0930, Joel Stanley wrote:
> Signed-off-by: Joel Stanley <joel-U3u1mxZcP9KHXe+LvDLADg@public.gmane.org>
> ---
> v2:
> Fix device tree binding example, thanks Baruch and Arnd for pointing this out
>
> .../interrupt-controller/aspeed,ast2400-vic.txt | 24 ++++++++++++++++++++++
> 1 file changed, 24 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/interrupt-controller/aspeed,ast2400-vic.txt
>
> diff --git a/Documentation/devicetree/bindings/interrupt-controller/aspeed,ast2400-vic.txt b/Documentation/devicetree/bindings/interrupt-controller/aspeed,ast2400-vic.txt
> new file mode 100644
> index 000000000000..86dede1755a2
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/interrupt-controller/aspeed,ast2400-vic.txt
> @@ -0,0 +1,24 @@
> +Aspeed Vectored Interrupt Controller
> +
> +These bindings are for the Aspeed AST2400 interrupt controller register layout.
> +The SoC has an legacy register layout, but this driver does not support that
> +mode of operation.
> +
> +Required properties:
> +
> +- compatible : should be "aspeed,ast2400-vic".
> +
> +- interrupt-controller : Identifies the node as an interrupt controller
> +- #interrupt-cells : Specifies the number of cells needed to encode an
> + interrupt source. The value shall be 1.
No need for level vs. edge flags?
> +- valid-sources : bitmask of valid irq sources
Drop this. Either all interrupt controllers need this or none of
them do. The valid sources are the ones described in the DT.
> +
> +Example:
> +
> + vic: interrupt-controller {
Needs a unit address.
> + compatible = "aspeed,ast2400-vic";
> + interrupt-controller;
> + #interrupt-cells = <1>;
> + valid-sources = < 0xffffffff 0x0007ffff>;
> + reg = <0x1e6c0080 0x80>;
> + };
> --
> 2.8.1
>
> --
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next prev parent reply other threads:[~2016-05-11 14:33 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <462797239-14765-1-git-send-email-joel@jms.id.au>
2016-05-09 13:58 ` [PATCH v2 0/2] irqchip: Support Aspeed IRQ controller Joel Stanley
2016-05-09 13:58 ` [PATCH v2 1/2] doc/devicetree: Add Aspeed VIC bindings Joel Stanley
[not found] ` <1462802317-27086-2-git-send-email-joel-U3u1mxZcP9KHXe+LvDLADg@public.gmane.org>
2016-05-11 14:33 ` Rob Herring [this message]
2016-05-12 1:01 ` Benjamin Herrenschmidt
[not found] ` <1463014882.20290.203.camel-XVmvHMARGAS8U2dJNN8I7kB+6BGkLq7r@public.gmane.org>
2016-05-12 17:20 ` Rob Herring
[not found] ` <CAL_JsqJDGmvDxm1kN1w6NQZs0JLeA-V=X_BWi=VOaMTwftLn-w-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2016-05-18 13:50 ` Joel Stanley
[not found] ` <CACPK8Xe6TDdV3dC=gizXLxLjUziDFhsupUbXSuYsn6bcrAxahQ-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2016-05-20 20:13 ` Rob Herring
[not found] ` <1462802317-27086-1-git-send-email-joel-U3u1mxZcP9KHXe+LvDLADg@public.gmane.org>
2016-05-09 13:58 ` [PATCH v2 2/2] irqchip: Add irq controller for Aspeed Joel Stanley
2016-05-12 14:43 ` [PATCH v3 0/2] irqchip: Support Aspeed IRQ controller Joel Stanley
[not found] ` <1463064193-2178-1-git-send-email-joel-U3u1mxZcP9KHXe+LvDLADg@public.gmane.org>
2016-05-12 14:43 ` [PATCH v3 1/2] doc/devicetree: Add Aspeed VIC bindings Joel Stanley
2016-05-12 14:43 ` [PATCH v3 2/2] irqchip: Add irq controller for Aspeed Joel Stanley
2016-06-22 18:53 ` [PATCH v3 0/2] irqchip: Support Aspeed IRQ controller Jason Cooper
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