[PATCH 0/8] ARM: dts: Add operating-points-v2 tables for TI platforms

[PATCH 0/8] ARM: dts: Add operating-points-v2 tables for TI platforms

[Dave Gerlach]

Hi,
This series adds operating-points-v2 tables for am335x, am437x, dra7xx,
and am57xx based platforms along with some support patches so that we
can enable more OPPs for the CPU on these platforms.

These patches rely on the ti-cpufreq series sent here [1] and provide
opp-supported-hw data for each OPP so that only the appropriate OPPs
for a specific piece of silicon get enabled.

Regards,
Dave

[1] https://www.mail-archive.com/linux-kernel@vger.kernel.org/msg1147940.html

Dave Gerlach (8):
  ARM: dts: am335x: Update MPU regulator range for TI boards
  ARM: dts: am33xx: Move to operating-points-v2 table and ti-cpufreq
    driver
  ARM: dts: am335x-boneblack: Enable 1GHz OPP for cpu
  ARM: dts: am4372: Add operating-points-v2 table
  ARM: dts: am437x-gp-evm: Hook dcdc2 as the cpu0-supply
  ARM: dts: dra7: Add dt node for the syscon control module wkup
  ARM: dts: dra7: Move cpus node to parent dts for dra74x and dra72x
  ARM: dts: dra7: Move to operating-points-v2 table

 arch/arm/boot/dts/am335x-bone-common.dtsi |  2 +-
 arch/arm/boot/dts/am335x-boneblack.dts    | 11 ++++
 arch/arm/boot/dts/am335x-evm.dts          |  2 +-
 arch/arm/boot/dts/am335x-evmsk.dts        |  2 +-
 arch/arm/boot/dts/am33xx.dtsi             | 88 ++++++++++++++++++++++++++-----
 arch/arm/boot/dts/am4372.dtsi             | 39 ++++++++++++++
 arch/arm/boot/dts/am437x-gp-evm.dts       |  4 ++
 arch/arm/boot/dts/dra7.dtsi               | 48 +++++++++++++++++
 arch/arm/boot/dts/dra72x.dtsi             | 16 ------
 arch/arm/boot/dts/dra74x.dtsi             | 25 +--------
 10 files changed, 181 insertions(+), 56 deletions(-)

-- 
2.7.3

[PATCH 1/8] ARM: dts: am335x: Update MPU regulator range for TI boards

[Dave Gerlach]

Now that we are moving to OPPv2 bindings and able to add 1GHz OPP for
MPU, let's update the max MPU voltage range to align with the maximum
possible value allowed in the operating-points table, which is max
target voltage of 132500 uV + 2%.

Signed-off-by: Dave Gerlach <d-gerlach-l0cyMroinI0@public.gmane.org>
---
 arch/arm/boot/dts/am335x-bone-common.dtsi | 2 +-
 arch/arm/boot/dts/am335x-evm.dts          | 2 +-
 arch/arm/boot/dts/am335x-evmsk.dts        | 2 +-
 3 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/arch/arm/boot/dts/am335x-bone-common.dtsi b/arch/arm/boot/dts/am335x-bone-common.dtsi
index 0cc150b87b86..13133f3587b8 100644
--- a/arch/arm/boot/dts/am335x-bone-common.dtsi
+++ b/arch/arm/boot/dts/am335x-bone-common.dtsi
@@ -318,7 +318,7 @@
 			/* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
 			regulator-name = "vdd_mpu";
 			regulator-min-microvolt = <925000>;
-			regulator-max-microvolt = <1325000>;
+			regulator-max-microvolt = <1351500>;
 			regulator-boot-on;
 			regulator-always-on;
 		};
diff --git a/arch/arm/boot/dts/am335x-evm.dts b/arch/arm/boot/dts/am335x-evm.dts
index 516673bb023d..5d28712ad253 100644
--- a/arch/arm/boot/dts/am335x-evm.dts
+++ b/arch/arm/boot/dts/am335x-evm.dts
@@ -640,7 +640,7 @@
 			/* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
 			regulator-name = "vdd_mpu";
 			regulator-min-microvolt = <912500>;
-			regulator-max-microvolt = <1312500>;
+			regulator-max-microvolt = <1351500>;
 			regulator-boot-on;
 			regulator-always-on;
 		};
diff --git a/arch/arm/boot/dts/am335x-evmsk.dts b/arch/arm/boot/dts/am335x-evmsk.dts
index 282fe1b37095..09308d66645b 100644
--- a/arch/arm/boot/dts/am335x-evmsk.dts
+++ b/arch/arm/boot/dts/am335x-evmsk.dts
@@ -560,7 +560,7 @@
 			/* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
 			regulator-name = "vdd_mpu";
 			regulator-min-microvolt = <912500>;
-			regulator-max-microvolt = <1312500>;
+			regulator-max-microvolt = <1351500>;
 			regulator-boot-on;
 			regulator-always-on;
 		};
-- 
2.7.3

--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

[PATCH 2/8] ARM: dts: am33xx: Move to operating-points-v2 table and ti-cpufreq driver

[Dave Gerlach]

Drop the operating-points table present in am33xx.dtsi and add an
operating-points-v2 table with all OPPs available for all silicon
revisions along with necessary data for use by ti-cpufreq to selectively
enable the appropriate OPPs at runtime. Also, drop the voltage-tolerance
value and provide voltages for each OPP using the <target min max>
format instead.

Information from AM335x Data Manual, SPRS717i, Revised December 2015,
Table 5-7.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
---
 arch/arm/boot/dts/am33xx.dtsi | 88 ++++++++++++++++++++++++++++++++++++-------
 1 file changed, 75 insertions(+), 13 deletions(-)

diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi
index 52be48bbd2dd..df1106f89ff2 100644
--- a/arch/arm/boot/dts/am33xx.dtsi
+++ b/arch/arm/boot/dts/am33xx.dtsi
@@ -45,19 +45,9 @@
 			device_type = "cpu";
 			reg = <0>;
 
-			/*
-			 * To consider voltage drop between PMIC and SoC,
-			 * tolerance value is reduced to 2% from 4% and
-			 * voltage value is increased as a precaution.
-			 */
-			operating-points = <
-				/* kHz    uV */
-				720000  1285000
-				600000  1225000
-				500000  1125000
-				275000  1125000
-			>;
-			voltage-tolerance = <2>; /* 2 percentage */
+			operating-points-v2 = <&cpu0_opp_table>;
+			ti,syscon-efuse = <&scm_conf 0x7fc 0x1fff 0>;
+			ti,syscon-rev = <&scm_conf 0x600>;
 
 			clocks = <&dpll_mpu_ck>;
 			clock-names = "cpu";
@@ -66,6 +56,78 @@
 		};
 	};
 
+	cpu0_opp_table: opp_table0 {
+		compatible = "operating-points-v2";
+
+		/*
+		 * The three following nodes are marked with opp-suspend
+		 * because the can not be enabled simultaneously on a
+		 * single SoC.
+		 */
+		opp50@300000000 {
+			opp-hz = /bits/ 64 <300000000>;
+			opp-microvolt = <950000 931000 969000>;
+			opp-supported-hw = <0x06 0x0010>;
+			opp-suspend;
+		};
+
+		opp100@275000000 {
+			opp-hz = /bits/ 64 <275000000>;
+			opp-microvolt = <1100000 1078000 1122000>;
+			opp-supported-hw = <0x01 0x00FF>;
+			opp-suspend;
+		};
+
+		opp100@300000000 {
+			opp-hz = /bits/ 64 <300000000>;
+			opp-microvolt = <1100000 1078000 1122000>;
+			opp-supported-hw = <0x06 0x0020>;
+			opp-suspend;
+		};
+
+		opp100@500000000 {
+			opp-hz = /bits/ 64 <500000000>;
+			opp-microvolt = <1100000 1078000 1122000>;
+			opp-supported-hw = <0x01 0xFFFF>;
+		};
+
+		opp100@600000000 {
+			opp-hz = /bits/ 64 <600000000>;
+			opp-microvolt = <1100000 1078000 1122000>;
+			opp-supported-hw = <0x06 0x0040>;
+		};
+
+		opp120@600000000 {
+			opp-hz = /bits/ 64 <600000000>;
+			opp-microvolt = <1200000 1176000 1224000>;
+			opp-supported-hw = <0x01 0xFFFF>;
+		};
+
+		opp120@720000000 {
+			opp-hz = /bits/ 64 <720000000>;
+			opp-microvolt = <1200000 1176000 1224000>;
+			opp-supported-hw = <0x06 0x0080>;
+		};
+
+		oppturbo@720000000 {
+			opp-hz = /bits/ 64 <720000000>;
+			opp-microvolt = <1260000 1234800 1285200>;
+			opp-supported-hw = <0x01 0xFFFF>;
+		};
+
+		oppturbo@800000000 {
+			opp-hz = /bits/ 64 <800000000>;
+			opp-microvolt = <1260000 1234800 1285200>;
+			opp-supported-hw = <0x06 0x0100>;
+		};
+
+		oppnitro@1000000000 {
+			opp-hz = /bits/ 64 <1000000000>;
+			opp-microvolt = <1325000 1298500 1351500>;
+			opp-supported-hw = <0x04 0x0200>;
+		};
+	};
+
 	pmu {
 		compatible = "arm,cortex-a8-pmu";
 		interrupts = <3>;
-- 
2.7.3

[PATCH 3/8] ARM: dts: am335x-boneblack: Enable 1GHz OPP for cpu

[Dave Gerlach]

Although all PG2.0 silicon may not support 1GHz OPP for the MPU, older
Beaglebone Blacks may have PG2.0 silicon populated and these particular
parts are guaranteed to support the OPP, so enable it for PG2.0 on
am335x-boneblack only.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
---
 arch/arm/boot/dts/am335x-boneblack.dts | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/arch/arm/boot/dts/am335x-boneblack.dts b/arch/arm/boot/dts/am335x-boneblack.dts
index 55c0e954b146..ca721670bd91 100644
--- a/arch/arm/boot/dts/am335x-boneblack.dts
+++ b/arch/arm/boot/dts/am335x-boneblack.dts
@@ -33,6 +33,17 @@
 	status = "okay";
 };
 
+&cpu0_opp_table {
+	/*
+	 * All PG 2.0 silicon may not support 1GHz but some of the early
+	 * BeagleBone Blacks have PG 2.0 silicon which is guaranteed
+	 * to support 1GHz OPP so enable it for PG 2.0 on this board.
+	 */
+	oppnitro@1000000000 {
+		opp-supported-hw = <0x06 0x0100>;
+	};
+};
+
 &am33xx_pinmux {
 	nxp_hdmi_bonelt_pins: nxp_hdmi_bonelt_pins {
 		pinctrl-single,pins = <
-- 
2.7.3

[PATCH 4/8] ARM: dts: am4372: Add operating-points-v2 table

[Dave Gerlach]

Add an operating-points-v2 table with all OPPs available for all silicon
revisions along with necessary data for use by ti-cpufreq to selectively
enable the appropriate OPPs at runtime.

Information from AM437x Data Manual, SPRS851B, Revised April 2015,
Table 5-2.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
---
 arch/arm/boot/dts/am4372.dtsi | 39 +++++++++++++++++++++++++++++++++++++++
 1 file changed, 39 insertions(+)

diff --git a/arch/arm/boot/dts/am4372.dtsi b/arch/arm/boot/dts/am4372.dtsi
index 12fcde4d4d2e..8bf2db276128 100644
--- a/arch/arm/boot/dts/am4372.dtsi
+++ b/arch/arm/boot/dts/am4372.dtsi
@@ -44,10 +44,49 @@
 			clocks = <&dpll_mpu_ck>;
 			clock-names = "cpu";
 
+			operating-points-v2 = <&cpu0_opp_table>;
+			ti,syscon-efuse = <&scm_conf 0x610 0x3f 0>;
+			ti,syscon-rev = <&scm_conf 0x600>;
+
 			clock-latency = <300000>; /* From omap-cpufreq driver */
 		};
 	};
 
+	cpu0_opp_table: opp_table0 {
+		compatible = "operating-points-v2";
+
+		opp50@300000000 {
+			opp-hz = /bits/ 64 <300000000>;
+			opp-microvolt = <950000 931000 969000>;
+			opp-supported-hw = <0xFF 0x01>;
+			opp-suspend;
+		};
+
+		opp100@600000000 {
+			opp-hz = /bits/ 64 <600000000>;
+			opp-microvolt = <1100000 1078000 1122000>;
+			opp-supported-hw = <0xFF 0x04>;
+		};
+
+		opp120@720000000 {
+			opp-hz = /bits/ 64 <720000000>;
+			opp-microvolt = <1200000 1176000 1224000>;
+			opp-supported-hw = <0xFF 0x08>;
+		};
+
+		oppturbo@800000000 {
+			opp-hz = /bits/ 64 <800000000>;
+			opp-microvolt = <1260000 1234800 1285200>;
+			opp-supported-hw = <0xFF 0x10>;
+		};
+
+		oppnitro@1000000000 {
+			opp-hz = /bits/ 64 <1000000000>;
+			opp-microvolt = <1325000 1298500 1351500>;
+			opp-supported-hw = <0xFF 0x20>;
+		};
+	};
+
 	gic: interrupt-controller@48241000 {
 		compatible = "arm,cortex-a9-gic";
 		interrupt-controller;
-- 
2.7.3

[PATCH 5/8] ARM: dts: am437x-gp-evm: Hook dcdc2 as the cpu0-supply

[Dave Gerlach]

Hook dcdc2 as the cpu0-supply.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
---
 arch/arm/boot/dts/am437x-gp-evm.dts | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/arch/arm/boot/dts/am437x-gp-evm.dts b/arch/arm/boot/dts/am437x-gp-evm.dts
index 5bcd3aa025bc..84832bf26b39 100644
--- a/arch/arm/boot/dts/am437x-gp-evm.dts
+++ b/arch/arm/boot/dts/am437x-gp-evm.dts
@@ -975,3 +975,7 @@
 	clock-names = "ext-clk", "int-clk";
 	status = "okay";
 };
+
+&cpu {
+	cpu0-supply = <&dcdc2>;
+};
-- 
2.7.3

[PATCH 6/8] ARM: dts: dra7: Add dt node for the syscon control module wkup

[Dave Gerlach]

Create a system control module node for the control module portion that
resides under l4_wkup.

Signed-off-by: Dave Gerlach <d-gerlach-l0cyMroinI0@public.gmane.org>
---
 arch/arm/boot/dts/dra7.dtsi | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index 3a8f3976f6f9..406f6ff21d7f 100644
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -233,6 +233,11 @@
 				prm_clockdomains: clockdomains {
 				};
 			};
+
+			scm_wkup: scm_conf@c000 {
+				compatible = "syscon";
+				reg = <0xc000 0x1000>;
+			};
 		};
 
 		axi@0 {
-- 
2.7.3

--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

[PATCH 7/8] ARM: dts: dra7: Move cpus node to parent dts for dra74x and dra72x

[Dave Gerlach]

Nearly all of the information in the cpus node, especially for cpu0, is
the same between dra74x and dra72x so move the common information to
the parent dra7.dtsi to avoid duplication of data.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
---
 arch/arm/boot/dts/dra7.dtsi   | 27 +++++++++++++++++++++++++++
 arch/arm/boot/dts/dra72x.dtsi | 16 ----------------
 arch/arm/boot/dts/dra74x.dtsi | 24 ------------------------
 3 files changed, 27 insertions(+), 40 deletions(-)

diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index 406f6ff21d7f..104b62657163 100644
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -73,6 +73,33 @@
 		interrupt-parent = <&gic>;
 	};
 
+	cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		cpu0: cpu@0 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a15";
+			reg = <0>;
+
+			operating-points = <
+				/* kHz    uV */
+				1000000	1060000
+				1176000	1160000
+				>;
+
+			clocks = <&dpll_mpu_ck>;
+			clock-names = "cpu";
+
+			clock-latency = <300000>; /* From omap-cpufreq driver */
+
+			/* cooling options */
+			cooling-min-level = <0>;
+			cooling-max-level = <2>;
+			#cooling-cells = <2>; /* min followed by max */
+		};
+	};
+
 	/*
 	 * The soc node represents the soc top level view. It is used for IPs
 	 * that are not memory mapped in the MPU view or for the MPU itself.
diff --git a/arch/arm/boot/dts/dra72x.dtsi b/arch/arm/boot/dts/dra72x.dtsi
index 70a217050a4c..67107605fb4c 100644
--- a/arch/arm/boot/dts/dra72x.dtsi
+++ b/arch/arm/boot/dts/dra72x.dtsi
@@ -12,22 +12,6 @@
 / {
 	compatible = "ti,dra722", "ti,dra72", "ti,dra7";
 
-	cpus {
-		#address-cells = <1>;
-		#size-cells = <0>;
-
-		cpu0: cpu@0 {
-			device_type = "cpu";
-			compatible = "arm,cortex-a15";
-			reg = <0>;
-
-			/* cooling options */
-			cooling-min-level = <0>;
-			cooling-max-level = <2>;
-			#cooling-cells = <2>; /* min followed by max */
-		};
-	};
-
 	pmu {
 		compatible = "arm,cortex-a15-pmu";
 		interrupt-parent = <&wakeupgen>;
diff --git a/arch/arm/boot/dts/dra74x.dtsi b/arch/arm/boot/dts/dra74x.dtsi
index 4220eeffc65a..0c31db3a8919 100644
--- a/arch/arm/boot/dts/dra74x.dtsi
+++ b/arch/arm/boot/dts/dra74x.dtsi
@@ -13,30 +13,6 @@
 	compatible = "ti,dra742", "ti,dra74", "ti,dra7";
 
 	cpus {
-		#address-cells = <1>;
-		#size-cells = <0>;
-
-		cpu0: cpu@0 {
-			device_type = "cpu";
-			compatible = "arm,cortex-a15";
-			reg = <0>;
-
-			operating-points = <
-				/* kHz    uV */
-				1000000	1060000
-				1176000	1160000
-				>;
-
-			clocks = <&dpll_mpu_ck>;
-			clock-names = "cpu";
-
-			clock-latency = <300000>; /* From omap-cpufreq driver */
-
-			/* cooling options */
-			cooling-min-level = <0>;
-			cooling-max-level = <2>;
-			#cooling-cells = <2>; /* min followed by max */
-		};
 		cpu@1 {
 			device_type = "cpu";
 			compatible = "arm,cortex-a15";
-- 
2.7.3

[PATCH 8/8] ARM: dts: dra7: Move to operating-points-v2 table

[Dave Gerlach]

Add an operating-points-v2 table with all OPPs available for all silicon
revisions along with necessary data for use by ti-opp driver to selectively
enable the appropriate OPPs at runtime and handle voltage transitions

As we now need to define voltage ranges for each OPP, we define the
minimum and maximum voltage to match the ranges possible for AVS class0
voltage as defined by the DRA7/AM57 Data Manual, with the exception of
using a range for OPP_OD based on historical data to ensure that SoCs
from older lots still continue to boot, even though more optimal voltages
are now the standard. Once an AVS Class0 driver is in place it will be
possible for these OPP voltages to be adjusted to any voltage within the
provided range.

Information from SPRS953, Revised December 2015.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
---
 arch/arm/boot/dts/dra7.dtsi   | 26 +++++++++++++++++++++-----
 arch/arm/boot/dts/dra74x.dtsi |  1 +
 2 files changed, 22 insertions(+), 5 deletions(-)

diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index 104b62657163..0d74f8a15937 100644
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -82,11 +82,9 @@
 			compatible = "arm,cortex-a15";
 			reg = <0>;
 
-			operating-points = <
-				/* kHz    uV */
-				1000000	1060000
-				1176000	1160000
-				>;
+			operating-points-v2 = <&cpu0_opp_table>;
+			ti,syscon-efuse = <&scm_wkup 0x20c 0xf80000 19>;
+			ti,syscon-rev = <&scm_wkup 0x204>;
 
 			clocks = <&dpll_mpu_ck>;
 			clock-names = "cpu";
@@ -100,6 +98,24 @@
 		};
 	};
 
+	cpu0_opp_table: opp_table0 {
+		compatible = "operating-points-v2";
+		opp-shared;
+
+		opp_nom@1000000000 {
+			opp-hz = /bits/ 64 <1000000000>;
+			opp-microvolt = <1060000 850000 1150000>;
+			opp-supported-hw = <0xFF 0x01>;
+			opp-suspend;
+		};
+
+		opp_od@1176000000 {
+			opp-hz = /bits/ 64 <1176000000>;
+			opp-microvolt = <1160000 885000 1160000>;
+			opp-supported-hw = <0xFF 0x02>;
+		};
+	};
+
 	/*
 	 * The soc node represents the soc top level view. It is used for IPs
 	 * that are not memory mapped in the MPU view or for the MPU itself.
diff --git a/arch/arm/boot/dts/dra74x.dtsi b/arch/arm/boot/dts/dra74x.dtsi
index 0c31db3a8919..0a8a5eee5dd0 100644
--- a/arch/arm/boot/dts/dra74x.dtsi
+++ b/arch/arm/boot/dts/dra74x.dtsi
@@ -17,6 +17,7 @@
 			device_type = "cpu";
 			compatible = "arm,cortex-a15";
 			reg = <1>;
+			operating-points-v2 = <&cpu0_opp_table>;
 		};
 	};
 
-- 
2.7.3

Re: [PATCH 2/8] ARM: dts: am33xx: Move to operating-points-v2 table and ti-cpufreq driver

[Viresh Kumar]

On 18-05-16, 18:36, Dave Gerlach wrote:
> +	cpu0_opp_table: opp_table0 {
> +		compatible = "operating-points-v2";
> +
> +		/*
> +		 * The three following nodes are marked with opp-suspend
> +		 * because the can not be enabled simultaneously on a
> +		 * single SoC.
> +		 */
> +		opp50@300000000 {
> +			opp-hz = /bits/ 64 <300000000>;
> +			opp-microvolt = <950000 931000 969000>;
> +			opp-supported-hw = <0x06 0x0010>;

Is there any place in either of the patchsets you have sent, that details the
usage of the above two values? I mean which defines, what is 0x6 and what is
0x1 ?

-- 
viresh

Re: [PATCH 0/8] ARM: dts: Add operating-points-v2 tables for TI platforms

[Viresh Kumar]

On 18-05-16, 18:36, Dave Gerlach wrote:
> Hi,
> This series adds operating-points-v2 tables for am335x, am437x, dra7xx,
> and am57xx based platforms along with some support patches so that we
> can enable more OPPs for the CPU on these platforms.
> 
> These patches rely on the ti-cpufreq series sent here [1] and provide
> opp-supported-hw data for each OPP so that only the appropriate OPPs
> for a specific piece of silicon get enabled.

Acked-by: Viresh Kumar <viresh.kumar@linaro.org>

-- 
viresh

Re: [PATCH 0/8] ARM: dts: Add operating-points-v2 tables for TI platforms

[Tony Lindgren]

* Viresh Kumar <viresh.kumar-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org> [160518 21:49]:
> On 18-05-16, 18:36, Dave Gerlach wrote:
> > Hi,
> > This series adds operating-points-v2 tables for am335x, am437x, dra7xx,
> > and am57xx based platforms along with some support patches so that we
> > can enable more OPPs for the CPU on these platforms.
> > 
> > These patches rely on the ti-cpufreq series sent here [1] and provide
> > opp-supported-hw data for each OPP so that only the appropriate OPPs
> > for a specific piece of silicon get enabled.
> 
> Acked-by: Viresh Kumar <viresh.kumar-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>

Applying all the dts changes into omap-for-v4.8/dt thanks.

Tony
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

Re: [PATCH 0/8] ARM: dts: Add operating-points-v2 tables for TI platforms

[Nishanth Menon]

On 06/10/2016 06:04 AM, Tony Lindgren wrote:
> * Viresh Kumar <viresh.kumar@linaro.org> [160518 21:49]:
>> On 18-05-16, 18:36, Dave Gerlach wrote:
>>> Hi,
>>> This series adds operating-points-v2 tables for am335x, am437x, dra7xx,
>>> and am57xx based platforms along with some support patches so that we
>>> can enable more OPPs for the CPU on these platforms.
>>>
>>> These patches rely on the ti-cpufreq series sent here [1] and provide
>>> opp-supported-hw data for each OPP so that only the appropriate OPPs
>>> for a specific piece of silicon get enabled.
>>
>> Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
> 
> Applying all the dts changes into omap-for-v4.8/dt thanks.
> 
> Tony
> 
Viresh, are we ready with the cpufreq series?

https://patchwork.kernel.org/patch/9122961/
https://patchwork.kernel.org/patch/9122921/

Also current series: https://patchwork.kernel.org/patch/9123071/
Seems to have comments pending.

Dave is on vacation for another week or so, doubt he can respond in
time -> Should we wait on this series till we get the cpufreq support in?

-- 
Regards,
Nishanth Menon

Re: [PATCH 0/8] ARM: dts: Add operating-points-v2 tables for TI platforms

[Viresh Kumar]

On 10-06-16, 09:50, Nishanth Menon wrote:
> On 06/10/2016 06:04 AM, Tony Lindgren wrote:
> > * Viresh Kumar <viresh.kumar@linaro.org> [160518 21:49]:
> >> On 18-05-16, 18:36, Dave Gerlach wrote:
> >>> Hi,
> >>> This series adds operating-points-v2 tables for am335x, am437x, dra7xx,
> >>> and am57xx based platforms along with some support patches so that we
> >>> can enable more OPPs for the CPU on these platforms.
> >>>
> >>> These patches rely on the ti-cpufreq series sent here [1] and provide
> >>> opp-supported-hw data for each OPP so that only the appropriate OPPs
> >>> for a specific piece of silicon get enabled.
> >>
> >> Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
> > 
> > Applying all the dts changes into omap-for-v4.8/dt thanks.
> > 
> > Tony
> > 
> Viresh, are we ready with the cpufreq series?
> 
> https://patchwork.kernel.org/patch/9122961/
> https://patchwork.kernel.org/patch/9122921/
> 
> Also current series: https://patchwork.kernel.org/patch/9123071/
> Seems to have comments pending.
> 
> Dave is on vacation for another week or so, doubt he can respond in
> time -> Should we wait on this series till we get the cpufreq support in?

Rafael handles all the merges, etc. It would be better if you can
reply to that thread instead.

-- 
viresh

Re: [PATCH 0/8] ARM: dts: Add operating-points-v2 tables for TI platforms

[Dave Gerlach]

On 06/10/2016 09:44 PM, Viresh Kumar wrote:
> On 10-06-16, 09:50, Nishanth Menon wrote:
>> On 06/10/2016 06:04 AM, Tony Lindgren wrote:
>>> * Viresh Kumar <viresh.kumar@linaro.org> [160518 21:49]:
>>>> On 18-05-16, 18:36, Dave Gerlach wrote:
>>>>> Hi,
>>>>> This series adds operating-points-v2 tables for am335x, am437x, dra7xx,
>>>>> and am57xx based platforms along with some support patches so that we
>>>>> can enable more OPPs for the CPU on these platforms.
>>>>>
>>>>> These patches rely on the ti-cpufreq series sent here [1] and provide
>>>>> opp-supported-hw data for each OPP so that only the appropriate OPPs
>>>>> for a specific piece of silicon get enabled.
>>>>
>>>> Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
>>>
>>> Applying all the dts changes into omap-for-v4.8/dt thanks.
>>>
>>> Tony
>>>
>> Viresh, are we ready with the cpufreq series?
>>
>> https://patchwork.kernel.org/patch/9122961/
>> https://patchwork.kernel.org/patch/9122921/
>>
>> Also current series: https://patchwork.kernel.org/patch/9123071/
>> Seems to have comments pending.
>>
>> Dave is on vacation for another week or so, doubt he can respond in
>> time -> Should we wait on this series till we get the cpufreq support in?
>
> Rafael handles all the merges, etc. It would be better if you can
> reply to that thread instead.
>

Sorry for the delay responding here, the only issue with this series 
would be that we haven't received an ACK on the DT binding doc from 
cpufreq series [1] from a DT maintainer, so if comments are received 
there these patches could potentially change. I had pinged but still no 
response either way.

Regards,
Dave

[1] https://patchwork.kernel.org/patch/9122921/

Re: [PATCH 0/8] ARM: dts: Add operating-points-v2 tables for TI platforms

[Dave Gerlach]

Hi,
On 06/20/2016 11:57 AM, Dave Gerlach wrote:
> On 06/10/2016 09:44 PM, Viresh Kumar wrote:
>> On 10-06-16, 09:50, Nishanth Menon wrote:
>>> On 06/10/2016 06:04 AM, Tony Lindgren wrote:
>>>> * Viresh Kumar <viresh.kumar@linaro.org> [160518 21:49]:
>>>>> On 18-05-16, 18:36, Dave Gerlach wrote:
>>>>>> Hi,
>>>>>> This series adds operating-points-v2 tables for am335x, am437x, dra7xx,
>>>>>> and am57xx based platforms along with some support patches so that we
>>>>>> can enable more OPPs for the CPU on these platforms.
>>>>>>
>>>>>> These patches rely on the ti-cpufreq series sent here [1] and provide
>>>>>> opp-supported-hw data for each OPP so that only the appropriate OPPs
>>>>>> for a specific piece of silicon get enabled.
>>>>>
>>>>> Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
>>>>
>>>> Applying all the dts changes into omap-for-v4.8/dt thanks.
>>>>
>>>> Tony
>>>>
>>> Viresh, are we ready with the cpufreq series?
>>>
>>> https://patchwork.kernel.org/patch/9122961/
>>> https://patchwork.kernel.org/patch/9122921/
>>>
>>> Also current series: https://patchwork.kernel.org/patch/9123071/
>>> Seems to have comments pending.
>>>
>>> Dave is on vacation for another week or so, doubt he can respond in
>>> time -> Should we wait on this series till we get the cpufreq support in?
>>
>> Rafael handles all the merges, etc. It would be better if you can
>> reply to that thread instead.
>>
> 
> Sorry for the delay responding here, the only issue with this series would be
> that we haven't received an ACK on the DT binding doc from cpufreq series [1]
> from a DT maintainer, so if comments are received there these patches could
> potentially change. I had pinged but still no response either way.
> 
> Regards,
> Dave
> 
> [1] https://patchwork.kernel.org/patch/9122921/

Seems this got merged and is already part of master, even though the binding it
uses is not yet finalized or accepted. I am about to send v2 of the ti-cpufreq
series that makes use of these bindings, and I will be sending a series to fix
these nodes that has already been merged, however it should *NOT* be merged.
until the binding and driver have been merged, as it could still potentially change.

Also, this series replaced the OPP v1 tables for am33xx and dra7, so cpufreq is
no longer enabled at the moment for these platforms. To fix this we could revert
patches:

f80bc97fd0a9 ("ARM: dts: dra7: Move to operating-points-v2 table")
c36e6ec90487 ("ARM: dts: am335x-boneblack: Enable 1GHz OPP for cpu")
4317be116210 ("ARM: dts: am33xx: Move to operating-points-v2 table and
ti-cpufreq driver")

until the ti-cpufreq driver series is merged, at which point we can add them
back in to re-enable cpufreq with the new driver.

Regards,
Dave