From mboxrd@z Thu Jan 1 00:00:00 1970 From: Rob Herring Subject: Re: [PATCH v2 07/13] dt-bindings: power: reset: Document ocelot-reset binding Date: Fri, 15 Dec 2017 14:23:32 -0600 Message-ID: <20171215202332.bn47da3fpkynusno@rob-hp-laptop> References: <20171208154618.20105-1-alexandre.belloni@free-electrons.com> <20171208154618.20105-8-alexandre.belloni@free-electrons.com> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Return-path: Content-Disposition: inline In-Reply-To: <20171208154618.20105-8-alexandre.belloni-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org> Sender: devicetree-owner-u79uwXL29TY76Z2rM5mHXA@public.gmane.org To: Alexandre Belloni Cc: Ralf Baechle , linux-mips-6z/3iImG2C8G8FEW9MqTrA@public.gmane.org, linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, Sebastian Reichel , linux-pm-u79uwXL29TY76Z2rM5mHXA@public.gmane.org List-Id: devicetree@vger.kernel.org On Fri, Dec 08, 2017 at 04:46:12PM +0100, Alexandre Belloni wrote: > Add binding documentation for the Microsemi Ocelot reset block. > > Cc: Rob Herring > Cc: devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org > Cc: Sebastian Reichel > Cc: linux-pm-u79uwXL29TY76Z2rM5mHXA@public.gmane.org > Signed-off-by: Alexandre Belloni > --- > .../devicetree/bindings/power/reset/ocelot-reset.txt | 17 +++++++++++++++++ > 1 file changed, 17 insertions(+) > create mode 100644 Documentation/devicetree/bindings/power/reset/ocelot-reset.txt > > diff --git a/Documentation/devicetree/bindings/power/reset/ocelot-reset.txt b/Documentation/devicetree/bindings/power/reset/ocelot-reset.txt > new file mode 100644 > index 000000000000..1bcf276b04cb > --- /dev/null > +++ b/Documentation/devicetree/bindings/power/reset/ocelot-reset.txt > @@ -0,0 +1,17 @@ > +Microsemi Ocelot reset controller > + > +The DEVCPU_GCB:CHIP_REGS have a SOFT_RST register that can be used to reset the > +SoC MIPS core. > + > +Required Properties: > + - compatible: "mscc,ocelot-chip-reset" > + > +Example: > + syscon@71070000 { > + compatible = "mscc,ocelot-chip-regs", "simple-mfd", "syscon"; > + reg = <0x71070000 0x1c>; > + > + reset { > + compatible = "mscc,ocelot-chip-reset"; Why do you need a subnode here other than as a way to instantiate a driver? Can you describe the SOFT_RST register in reg property here (without having overlapping regions)? -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html