From: Vinod Koul <vinod.koul-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org>
To: Hyun Kwon <hyun.kwon-gjFFaj9aHVfQT0dZR+AlfA@public.gmane.org>
Cc: dmaengine-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
Michal Simek
<michal.simek-gjFFaj9aHVfQT0dZR+AlfA@public.gmane.org>,
Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
Subject: Re: [PATCH 1/2] dt: bindings: dma: xilinx: dpdma: DT bindings for Xilinx DPDMA
Date: Fri, 12 Jan 2018 18:58:51 +0530 [thread overview]
Message-ID: <20180112132850.GN18649@localhost> (raw)
In-Reply-To: <1515204848-3493-1-git-send-email-hyun.kwon-gjFFaj9aHVfQT0dZR+AlfA@public.gmane.org>
On Fri, Jan 05, 2018 at 06:14:07PM -0800, Hyun Kwon wrote:
> The ZynqMP includes the DisplayPort subsystem with its own DMA engine
> called DPDMA. The DPDMA IP comes with 6 individual channels
> (4 for display, 2 for audio). This documentation describes DT bindings
> of DPDMA.
Pls cc DT maintainers on this patch
> Signed-off-by: Hyun Kwon <hyun.kwon-gjFFaj9aHVfQT0dZR+AlfA@public.gmane.org>
> Signed-off-by: Michal Simek <michal.simek-gjFFaj9aHVfQT0dZR+AlfA@public.gmane.org>
> ---
> .../bindings/dma/xilinx/xilinx_dpdma.txt | 64 ++++++++++++++++++++++
> 1 file changed, 64 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/dma/xilinx/xilinx_dpdma.txt
>
> diff --git a/Documentation/devicetree/bindings/dma/xilinx/xilinx_dpdma.txt b/Documentation/devicetree/bindings/dma/xilinx/xilinx_dpdma.txt
> new file mode 100644
> index 0000000..51016d8
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/dma/xilinx/xilinx_dpdma.txt
> @@ -0,0 +1,64 @@
> +Device-Tree bindings for Xilinx ZynqMP DP Subsystem DMA
> +
> +The ZynqMP DisplayPort subsystem handles DMA channel buffer management,
> +blending, and audio mixing. The DisplayPort subsystem receives display
> +and audio frames from DPDMA and transmits output to the DisplayPort IP core.
> +
> +Required properties:
> + - compatible: Should be "xlnx,dpdma".
> + - reg: Base address and size of the IP core.
> + - interrupts: Interrupt number.
> + - interrupts-parent: phandle for interrupt controller.
> + - clocks: phandle for AXI clock
> + - clock-names: The identification string, "axi_clk", is always required.
> +
> +Required child node properties:
> +- compatible: Should be one of "xlnx,video0", "xlnx,video1", "xlnx,video2",
> + "xlnx,graphics", "xlnx,audio0", or "xlnx,audio1".
> +
> +Example:
> +
> + xlnx_dpdma: axidpdma@43c10000 {
> + compatible = "xlnx,dpdma";
> + reg = <0x43c10000 0x1000>;
> + interrupts = <0 54 4>;
> + interrupt-parent = <&intc>;
> + clocks = <&clkc 16>;
> + clock-names = "axi_clk";
> +
> + #dma-cells = <1>;
> + dma-video0channel {
> + compatible = "xlnx,video0";
> + };
> + dma-video1channel {
> + compatible = "xlnx,video1";
> + };
> + dma-video2channel {
> + compatible = "xlnx,video2";
> + };
> + dma-graphicschannel {
> + compatible = "xlnx,graphics";
> + };
> + dma-audio0channel {
> + compatible = "xlnx,audio0";
> + };
> + dma-audio1channel {
> + compatible = "xlnx,audio1";
> + };
> + };
> +
> +* DMA client
> +
> +Required properties:
> +- dmas: a list of <[DPDMA device phandle] [Channel ID]> pairs. "Channel ID"
> + is defined as video0 = 0, video1 = 1, video2 = 2, graphics = 3, audio0 = 4,
> + and audio1 = 5.
> +
> +Example:
> +
> + xlnx_drm {
> + ...
> + dmas = <&xlnx_dpdma 3>;
> + dma-names = "dma";
> + ...
> + };
> --
> 2.7.4
>
> --
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--
~Vinod
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next prev parent reply other threads:[~2018-01-12 13:28 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-01-06 2:14 [PATCH 1/2] dt: bindings: dma: xilinx: dpdma: DT bindings for Xilinx DPDMA Hyun Kwon
[not found] ` <1515204848-3493-1-git-send-email-hyun.kwon-gjFFaj9aHVfQT0dZR+AlfA@public.gmane.org>
2018-01-06 2:14 ` [PATCH 2/2] dma: xilinx: dpdma: Add the Xilinx DisplayPort DMA engine driver Hyun Kwon
[not found] ` <1515204848-3493-2-git-send-email-hyun.kwon-gjFFaj9aHVfQT0dZR+AlfA@public.gmane.org>
2018-01-12 14:13 ` Vinod Koul
2018-01-23 17:03 ` Hyun Kwon
[not found] ` <MWHPR02MB249345183B6CCD86A56A4E1ED6E30-RUky8eZECECTw9ZLCNw7fKnrV9Ap65cLvxpqHgZTriW3zl9H0oFU5g@public.gmane.org>
2018-01-24 14:40 ` Vinod Koul
2018-01-24 17:45 ` Hyun Kwon
[not found] ` <CY4PR02MB248850638A4D19CE51F1E224D6E20-CJeEToEUXu1uV7Svx/7JSanrV9Ap65cLvxpqHgZTriW3zl9H0oFU5g@public.gmane.org>
2018-01-29 4:19 ` Vinod Koul
2018-01-12 13:28 ` Vinod Koul [this message]
2018-01-19 19:37 ` [PATCH 1/2] dt: bindings: dma: xilinx: dpdma: DT bindings for Xilinx DPDMA Rob Herring
2018-01-23 17:03 ` Hyun Kwon
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