From: Heiko Stuebner <heiko@sntech.de>
To: linux-clk@vger.kernel.org
Cc: mturquette@baylibre.com, sboyd@codeaurora.org,
linux-rockchip@lists.infradead.org, robh+dt@kernel.org,
mark.rutland@arm.com, devicetree@vger.kernel.org,
yang.zheng@rock-chips.com, zhangqing@rock-chips.com,
Zheng Yang <zhengyang@rock-chips.com>,
Heiko Stuebner <heiko@sntech.de>
Subject: [PATCH 6/7] clk: rockchip: add flags for rk3328 dclk_lcdc
Date: Mon, 22 Jan 2018 15:15:29 +0100 [thread overview]
Message-ID: <20180122141530.12398-7-heiko@sntech.de> (raw)
In-Reply-To: <20180122141530.12398-1-heiko@sntech.de>
From: Zheng Yang <zhengyang@rock-chips.com>
dclk_lcdc can be sourced from a general pll source as well
as the hdmiphy's pll output. We will want to set this source
by hand (to the system-pll-source in most cases) and also
want rate changes to this clock to be able to also touch
the pll source clock if needed, so add CLK_SET_RATE_PARENT
and CLK_SET_RATE_NO_REPARENT for dclk_lcdc.
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
[ammended commit message]
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
drivers/clk/rockchip/clk-rk3328.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/rockchip/clk-rk3328.c b/drivers/clk/rockchip/clk-rk3328.c
index 983ad5760ce0..f680b421b6d5 100644
--- a/drivers/clk/rockchip/clk-rk3328.c
+++ b/drivers/clk/rockchip/clk-rk3328.c
@@ -602,7 +602,7 @@ static struct rockchip_clk_branch rk3328_clk_branches[] __initdata = {
RK3328_CLKGATE_CON(5), 6, GFLAGS),
DIV(DCLK_HDMIPHY, "dclk_hdmiphy", "dclk_lcdc_src", 0,
RK3328_CLKSEL_CON(40), 3, 3, DFLAGS),
- MUX(DCLK_LCDC, "dclk_lcdc", mux_dclk_lcdc_p, 0,
+ MUX(DCLK_LCDC, "dclk_lcdc", mux_dclk_lcdc_p, CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT,
RK3328_CLKSEL_CON(40), 1, 1, MFLAGS),
/*
--
2.14.2
prev parent reply other threads:[~2018-01-22 14:15 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-01-22 14:15 [PATCH 0/7] clk: rockchip: rk3328 fixes in preparation of graphics support Heiko Stuebner
2018-01-22 14:15 ` [PATCH 1/7] clk: rockchip: fix hclk_vio_niu on rk3328 Heiko Stuebner
2018-01-22 14:15 ` [PATCH 4/7] clk: rockchip: protect all remaining rk3328 interconnect clocks Heiko Stuebner
[not found] ` <20180122141530.12398-1-heiko-4mtYJXux2i+zQB+pC5nmwQ@public.gmane.org>
2018-01-22 14:15 ` [PATCH 2/7] clk: rockchip: remove HCLK_VIO from rk3328 dt header Heiko Stuebner
2018-01-22 14:15 ` [PATCH 3/7] clk: rockchip: export sclk_hdmi_sfc on rk3328 Heiko Stuebner
2018-01-22 14:15 ` [PATCH 5/7] clk: rockchip: remove ignore_unused flag from rk3328 vio_h2p clocks Heiko Stuebner
2018-01-22 14:15 ` [PATCH 7/7] clk: rockchip: document hdmi_phy external input for rk3328 Heiko Stuebner
[not found] ` <20180122141530.12398-8-heiko-4mtYJXux2i+zQB+pC5nmwQ@public.gmane.org>
2018-01-29 23:12 ` Rob Herring
2018-02-12 14:02 ` [PATCH 0/7] clk: rockchip: rk3328 fixes in preparation of graphics support Heiko Stuebner
2018-01-22 14:15 ` Heiko Stuebner [this message]
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