From: Brian Norris <briannorris@chromium.org>
To: "Rafael J. Wysocki" <rjw@rjwysocki.net>
Cc: JeffyChen <jeffy.chen@rock-chips.com>,
tony@atomide.com, linux-kernel@vger.kernel.org,
bhelgaas@google.com, linux-pm@vger.kernel.org,
shawn.lin@rock-chips.com, dianders@chromium.org,
devicetree@vger.kernel.org, linux-pci@vger.kernel.org,
Rob Herring <robh+dt@kernel.org>,
Frank Rowand <frowand.list@gmail.com>
Subject: Re: [RFC PATCH v11 4/5] PCI / PM: Add support for the PCIe WAKE# signal for OF
Date: Wed, 24 Jan 2018 17:22:04 -0800 [thread overview]
Message-ID: <20180125012148.lcgnxi3uwcjzue7o@ban.mtv.corp.google.com> (raw)
In-Reply-To: <2806186.IK6EZBC0cX@aspire.rjw.lan>
Hi Rafael,
Sorry once again on the delays...My email hygiene has been getting bad,
so mail gets buried.
On Fri, Jan 05, 2018 at 02:13:33AM +0100, Rafael J. Wysocki wrote:
> On Friday, January 5, 2018 1:41:31 AM CET Brian Norris wrote:
> > On Wed, Dec 27, 2017 at 01:57:07AM +0100, Rafael J. Wysocki wrote:
> > > On Tuesday, December 26, 2017 2:06:47 AM CET JeffyChen wrote:
> > > > On 12/26/2017 08:11 AM, Rafael J. Wysocki wrote:
> > > > >> >+
> > > > >> >+ dn = pci_device_to_OF_node(ppdev);
> > > > >> >+ if (!dn)
> > > > >> >+ return 0;
> > > > >> >+
> > > > >> >+ irq = of_irq_get_byname(dn, "wakeup");
> > > > > Why is this a property of the bridge and not of the device itself?
> >
> > Wait, isn't 'dn' the port node, not the bridge node?
>
> I may be confused about the structure you have in DT.
Probably :) And my DT structure may not be correct. But it's easily
available to review. See arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi:
http://elixir.free-electrons.com/linux/v4.14.2/source/arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi#L705
It has a bridge->port->device nesting hierarchy. I'm not actually sure
where this came from exactly, but I *thought* it was derived from the
standard documentation:
Documentation/devicetree/bindings/pci/pci.txt
PCI Bus Binding to: IEEE Std 1275-1994
http://www.devicetree.org/open-firmware/bindings/pci/pci2_1.pdf
I'm not so sure now...
> In the device hierarchy PCIe ports are represented as bridges.
But device hierarchy can be slightly different than DT hierarchy. In our
case, pcie@0,0 seems to correspond to the port, but has no companion
"device".
Or maybe I'm really off-base.
> > > > That is suggested by Brian, because in that way, the wakeup pin would
> > > > not "tied to what exact device is installed (or no device, if it's a slot)."
> >
> > I believe my thinking has evolved a bit over time, and I definitely am
> > not the one true authority on this. I'll explain my main concerns, and
> > whatever solution resolves these concerns is fine with me.
> >
> > * I was primarily interested in avoiding handling WAKE# in the endpoint
> > drivers (e.g., as mwifiex is today).
>
> OK, everybody on this thread is interested in that. :-)
Sure :)
> > * I was also interested in not having to redefine a new DT device
> > node (with new "pciABCD,1234" compatible property) for each new device
> > attached. That just won't work for removable cards.
>
> So if you make it the property of a bridge, it should be fine (as long
> as the bridge itself is not removable).
OK...in that case you've answered your question at the top: "Why is this
a property of the bridge and not of the device itself?" I think Jeffy
answered similarly, but this walked you through how *I* got to that
conclusion, at least.
> > I need to reread the rest of this thread a few times to really
> > understand what Rafael and Tony are discussing. But I feel like some of
> > this is still moving away from the second point above.
> >
> > > But I don't think it works when there are two devices using different WAKE#
> > > interrupt lines under the same bridge. Or how does it work then?
>
> We seem to have agreed that this case needs to be neglected here.
OK, I guess that's a reasonable conclusion.
> The "wakeup-interrupt" property at the bridge level basically has to be defined
> as the wakeup interrupt for all devices on the bus under the bridge.
The only thing I'm at a loss for is whether this goes in (referring to
rk3399-gru.dtsi) &pcie or &pci_rootport. I think some versions of this
series have been aiming for the former, and some the latter.
Brian
next prev parent reply other threads:[~2018-01-25 1:22 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-12-25 11:47 [RFC PATCH v11 0/5] PCI: rockchip: Move PCIe WAKE# handling into pci core Jeffy Chen
2017-12-25 11:47 ` [RFC PATCH v11 1/5] dt-bindings: PCI: Add definition of PCIe WAKE# irq and PCI irq Jeffy Chen
2017-12-25 11:47 ` [RFC PATCH v11 2/5] of/irq: Adjust of_pci_irq parsing for multiple interrupts Jeffy Chen
2017-12-25 11:47 ` [RFC PATCH v11 4/5] PCI / PM: Add support for the PCIe WAKE# signal for OF Jeffy Chen
[not found] ` <20171225114742.18920-5-jeffy.chen-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
2017-12-26 0:11 ` Rafael J. Wysocki
2017-12-26 1:06 ` JeffyChen
2017-12-27 0:57 ` Rafael J. Wysocki
2017-12-27 15:08 ` Tony Lindgren
2017-12-28 0:48 ` Rafael J. Wysocki
[not found] ` <CAJZ5v0iaHPGiZJURhqZb8wdJXHxrAEHVN=U6rNHWGf-FGemPJA-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2017-12-28 4:22 ` Tony Lindgren
[not found] ` <20171228042205.GG3875-4v6yS6AI5VpBDgjK7y7TUQ@public.gmane.org>
2017-12-28 12:18 ` Rafael J. Wysocki
[not found] ` <CAJZ5v0hpK0_vjX3HinCpsFuKffVUn3d5EnqXdz0P893aRZgnRw-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2017-12-28 16:51 ` Tony Lindgren
2017-12-28 17:29 ` Rafael J. Wysocki
2017-12-28 17:43 ` Rafael J. Wysocki
[not found] ` <CAJZ5v0hSMqwitCvfi7D+sknuO0YFr5F-kdkV-cSoVp30Cmdaeg-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2017-12-29 17:16 ` Tony Lindgren
2017-12-29 17:15 ` Tony Lindgren
2017-12-29 23:39 ` Rafael J. Wysocki
[not found] ` <CAJZ5v0icePurJoGdVtX06j=XHPdZSqXgm+vhL47ngv7OZoL3fw-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2017-12-30 0:21 ` Rafael J. Wysocki
2018-01-03 20:00 ` Tony Lindgren
[not found] ` <6120485.xubBpvge6h-yvgW3jdyMHm1GS7QM15AGw@public.gmane.org>
2018-01-03 20:08 ` Tony Lindgren
2018-01-05 0:11 ` Rafael J. Wysocki
2018-01-05 0:41 ` Brian Norris
[not found] ` <20180105004130.GA151625-hpIqsD4AKlfQT0dZR+AlfA@public.gmane.org>
2018-01-05 1:13 ` Rafael J. Wysocki
2018-01-25 1:22 ` Brian Norris [this message]
2018-01-25 16:40 ` Tony Lindgren
2018-01-25 16:54 ` Rafael J. Wysocki
[not found] ` <CAJZ5v0h7JvEFTV1mbqxtK8P0aoums2Cvjy3uU1gK4E26_rtZ5g-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2018-01-25 17:47 ` Brian Norris
2017-12-25 11:47 ` [RFC PATCH v11 5/5] arm64: dts: rockchip: Move PCIe WAKE# irq to pcie port for Gru Jeffy Chen
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