From mboxrd@z Thu Jan 1 00:00:00 1970 From: Helen Koike Subject: [PATCH v8 11/14] dt-bindings: Document the Rockchip MIPI RX D-PHY bindings Date: Tue, 30 Jul 2019 15:42:53 -0300 Message-ID: <20190730184256.30338-12-helen.koike@collabora.com> References: <20190730184256.30338-1-helen.koike@collabora.com> Mime-Version: 1.0 Content-Transfer-Encoding: 8bit Return-path: In-Reply-To: <20190730184256.30338-1-helen.koike@collabora.com> Sender: linux-kernel-owner@vger.kernel.org To: linux-rockchip@lists.infradead.org Cc: devicetree@vger.kernel.org, eddie.cai.linux@gmail.com, mchehab@kernel.org, heiko@sntech.de, jacob2.chen@rock-chips.com, jeffy.chen@rock-chips.com, zyc@rock-chips.com, linux-kernel@vger.kernel.org, tfiga@chromium.org, hans.verkuil@cisco.com, laurent.pinchart@ideasonboard.com, sakari.ailus@linux.intel.com, kernel@collabora.com, ezequiel@collabora.com, linux-media@vger.kernel.org, linux-arm-kernel@lists.infradead.org, zhengsq@rock-chips.com, Rob Herring , Helen Koike List-Id: devicetree@vger.kernel.org From: Jacob Chen Add DT bindings documentation for Rockchip MIPI D-PHY RX Signed-off-by: Jacob Chen Reviewed-by: Rob Herring [update for upstream] Signed-off-by: Helen Koike --- Changes in v8: None Changes in v7: - updated doc with new design and tested example .../bindings/media/rockchip-mipi-dphy.txt | 38 +++++++++++++++++++ 1 file changed, 38 insertions(+) create mode 100644 Documentation/devicetree/bindings/media/rockchip-mipi-dphy.txt diff --git a/Documentation/devicetree/bindings/media/rockchip-mipi-dphy.txt b/Documentation/devicetree/bindings/media/rockchip-mipi-dphy.txt new file mode 100644 index 000000000000..2305d44d92db --- /dev/null +++ b/Documentation/devicetree/bindings/media/rockchip-mipi-dphy.txt @@ -0,0 +1,38 @@ +Rockchip SoC MIPI RX D-PHY +------------------------------------------------------------- + +Required properties: +- compatible: value should be one of the following + "rockchip,rk3288-mipi-dphy" + "rockchip,rk3399-mipi-dphy" +- clocks : list of clock specifiers, corresponding to entries in + clock-names property; +- clock-names: required clock name. +- #phy-cells: Number of cells in a PHY specifier; Should be 0. + +MIPI RX D-PHY use registers in "general register files", it +should be a child of the GRF. + +Optional properties: +- reg: offset and length of the register set for the device. +- rockchip,grf: MIPI TX1RX1 D-PHY not only has its own register but also + the GRF, so it is only necessary for MIPI TX1RX1 D-PHY. + +Device node example +------------------- + +grf: syscon@ff770000 { + compatible = "rockchip,rk3399-grf", "syscon", "simple-mfd"; + +... + + dphy: mipi-dphy { + compatible = "rockchip,rk3399-mipi-dphy"; + clocks = <&cru SCLK_MIPIDPHY_REF>, + <&cru SCLK_DPHY_RX0_CFG>, + <&cru PCLK_VIO_GRF>; + clock-names = "dphy-ref", "dphy-cfg", "grf"; + power-domains = <&power RK3399_PD_VIO>; + #phy-cells = <0>; + }; +}; -- 2.22.0