From mboxrd@z Thu Jan 1 00:00:00 1970 From: Atish Patra Subject: [PATCH v3 0/5] Miscellaneous fixes Date: Wed, 31 Jul 2019 17:58:38 -0700 Message-ID: <20190801005843.10343-1-atish.patra@wdc.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+glpr-linux-riscv=m.gmane.org@lists.infradead.org To: linux-kernel@vger.kernel.org Cc: Mark Rutland , devicetree@vger.kernel.org, Albert Ou , Daniel Lezcano , Yangtao Li , Greg Kroah-Hartman , Anup Patel , Johan Hovold , Atish Patra , Rob Herring , Palmer Dabbelt , Gary Guo , Paul Walmsley , linux-riscv@lists.infradead.org, Enrico Weigelt , Thomas Gleixner , Allison Randal List-Id: devicetree@vger.kernel.org This patch series have some unrelated fixes related to clocksource, dt-bindings and isa strings. I combined them into series as most of them are prerequisite for kvm patch series. Changes from v2->v3: 1. Updated commit text of dt binding patch. 2. Removed couple of remaining uppercase usage. Changes from v1->v2: 1. Dropped the case-insensitive support patch and added a dt-bindings update patch. 2. Added a export symbol patch. Anup Patel (1): RISC-V: Add riscv_isa reprensenting ISA features common across CPUs Atish Patra (4): RISC-V: Remove per cpu clocksource RISC-V: Fix unsupported isa string info. RISC-V: Export few kernel symbols dt-bindings: Update the riscv,isa string description .../devicetree/bindings/riscv/cpus.yaml | 4 +- arch/riscv/include/asm/hwcap.h | 16 +++++++ arch/riscv/kernel/cpu.c | 47 +++++++++++++++---- arch/riscv/kernel/cpufeature.c | 39 +++++++++++++-- arch/riscv/kernel/smp.c | 2 +- arch/riscv/kernel/time.c | 1 + drivers/clocksource/timer-riscv.c | 6 +-- 7 files changed, 96 insertions(+), 19 deletions(-) -- 2.21.0