From: Yann Gautier <yann.gautier@st.com>
To: <alexandre.torgue@st.com>
Cc: <mcoquelin.stm32@gmail.com>, <robh+dt@kernel.org>,
<mark.rutland@arm.com>,
<linux-stm32@st-md-mailman.stormreply.com>,
<linux-arm-kernel@lists.infradead.org>,
<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
Yann Gautier <yann.gautier@st.com>,
"Ludovic Barre" <ludovic.barre@st.com>
Subject: [PATCH 2/4] ARM: dts: stm32: add sdmmc2 & 3 nodes for STM32MP157 SoC
Date: Wed, 6 Nov 2019 11:09:36 +0100 [thread overview]
Message-ID: <20191106100938.11368-3-yann.gautier@st.com> (raw)
In-Reply-To: <20191106100938.11368-1-yann.gautier@st.com>
The STM32MP157 SoC series includes 3 instances of the SDMMC peripheral.
The sdmmc2 and sdmmc3 nodes are added in STM32MP157 SoC DT file.
Signed-off-by: Ludovic Barre <ludovic.barre@st.com>
Signed-off-by: Yann Gautier <yann.gautier@st.com>
---
arch/arm/boot/dts/stm32mp157c.dtsi | 33 +++++++++++++++++++++++++++++-
1 file changed, 32 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/stm32mp157c.dtsi b/arch/arm/boot/dts/stm32mp157c.dtsi
index 9b11654a0a39..fa71aac0b0c5 100644
--- a/arch/arm/boot/dts/stm32mp157c.dtsi
+++ b/arch/arm/boot/dts/stm32mp157c.dtsi
@@ -1030,6 +1030,21 @@
};
};
+ sdmmc3: sdmmc@48004000 {
+ compatible = "arm,pl18x", "arm,primecell";
+ arm,primecell-periphid = <0x10153180>;
+ reg = <0x48004000 0x400>;
+ interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "cmd_irq";
+ clocks = <&rcc SDMMC3_K>;
+ clock-names = "apb_pclk";
+ resets = <&rcc SDMMC3_R>;
+ cap-sd-highspeed;
+ cap-mmc-highspeed;
+ max-frequency = <120000000>;
+ status = "disabled";
+ };
+
usbotg_hs: usb-otg@49000000 {
compatible = "snps,dwc2";
reg = <0x49000000 0x10000>;
@@ -1295,13 +1310,29 @@
arm,primecell-periphid = <0x10153180>;
reg = <0x58005000 0x1000>;
interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "cmd_irq";
+ interrupt-names = "cmd_irq";
clocks = <&rcc SDMMC1_K>;
clock-names = "apb_pclk";
resets = <&rcc SDMMC1_R>;
cap-sd-highspeed;
cap-mmc-highspeed;
max-frequency = <120000000>;
+ status = "disabled";
+ };
+
+ sdmmc2: sdmmc@58007000 {
+ compatible = "arm,pl18x", "arm,primecell";
+ arm,primecell-periphid = <0x10153180>;
+ reg = <0x58007000 0x1000>;
+ interrupts = <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "cmd_irq";
+ clocks = <&rcc SDMMC2_K>;
+ clock-names = "apb_pclk";
+ resets = <&rcc SDMMC2_R>;
+ cap-sd-highspeed;
+ cap-mmc-highspeed;
+ max-frequency = <120000000>;
+ status = "disabled";
};
crc1: crc@58009000 {
--
2.17.1
next prev parent reply other threads:[~2019-11-06 10:10 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-11-06 10:09 [PATCH 0/4] Update sdmmc nodes for STM32MP1 Yann Gautier
2019-11-06 10:09 ` [PATCH 1/4] ARM: dts: stm32: update slew-rate properties for sdmmc1 on stm32mp157 Yann Gautier
2019-11-06 10:09 ` Yann Gautier [this message]
2019-11-06 10:09 ` [PATCH 3/4] ARM: dts: stm32: enable sdmmc2 node for stm32mp157c-ed1 board Yann Gautier
2019-11-06 10:09 ` [PATCH 4/4] ARM: dts: stm32: add sdmmc3 node for STM32MP1 boards Yann Gautier
2019-11-15 10:50 ` [PATCH 0/4] Update sdmmc nodes for STM32MP1 Alexandre Torgue
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