From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1DFB4C43141 for ; Tue, 3 Dec 2019 04:04:22 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id EAD3520722 for ; Tue, 3 Dec 2019 04:04:21 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726592AbfLCEEV (ORCPT ); Mon, 2 Dec 2019 23:04:21 -0500 Received: from pbmsgap02.intersil.com ([192.157.179.202]:53104 "EHLO pbmsgap02.intersil.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726486AbfLCEEV (ORCPT ); Mon, 2 Dec 2019 23:04:21 -0500 Received: from pps.filterd (pbmsgap02.intersil.com [127.0.0.1]) by pbmsgap02.intersil.com (8.16.0.27/8.16.0.27) with SMTP id xB33hRn4007650; Mon, 2 Dec 2019 22:46:47 -0500 Received: from pbmxdp03.intersil.corp (pbmxdp03.pb.intersil.com [132.158.200.224]) by pbmsgap02.intersil.com with ESMTP id 2wkkffj00a-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Mon, 02 Dec 2019 22:46:47 -0500 Received: from pbmxdp01.intersil.corp (132.158.200.222) by pbmxdp03.intersil.corp (132.158.200.224) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P384) id 15.1.1531.3; Mon, 2 Dec 2019 22:46:45 -0500 Received: from localhost.localdomain (132.158.202.109) by pbmxdp01.intersil.corp (132.158.200.222) with Microsoft SMTP Server id 15.1.1531.3 via Frontend Transport; Mon, 2 Dec 2019 22:46:44 -0500 From: Chris Brandt To: Mark Brown , Rob Herring , "Mark Rutland" , Geert Uytterhoeven , Michael Turquette , Stephen Boyd CC: , , , , Mason Yang , Sergei Shtylyov , Chris Brandt Subject: [PATCH 5/6] ARM: dts: r7s9210: Add SPIBSC Device support Date: Mon, 2 Dec 2019 22:45:18 -0500 Message-ID: <20191203034519.5640-6-chris.brandt@renesas.com> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20191203034519.5640-1-chris.brandt@renesas.com> References: <20191203034519.5640-1-chris.brandt@renesas.com> MIME-Version: 1.0 Content-Transfer-Encoding: 7BIT Content-Type: text/plain; charset=US-ASCII X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:,, definitions=2019-12-02_06:,, signatures=0 X-Proofpoint-Spam-Details: rule=junk_notspam policy=junk score=0 suspectscore=2 malwarescore=0 phishscore=0 bulkscore=0 spamscore=0 mlxscore=0 mlxlogscore=999 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1911200000 definitions=main-1912030031 X-Proofpoint-Spam-Reason: mlx Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add SPIBSC Device support for RZ/A2. Signed-off-by: Chris Brandt --- arch/arm/boot/dts/r7s9210.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/arm/boot/dts/r7s9210.dtsi b/arch/arm/boot/dts/r7s9210.dtsi index 72b79770e336..ac4949c9e47a 100644 --- a/arch/arm/boot/dts/r7s9210.dtsi +++ b/arch/arm/boot/dts/r7s9210.dtsi @@ -68,6 +68,16 @@ cache-level = <2>; }; + spibsc: spi@1f800000 { + compatible = "renesas,r7s9210-spibsc", "renesas,spibsc"; + reg = <0x1f800000 0x8c>, <0x20000000 0x10000000 >; + clocks = <&cpg CPG_MOD 83>; + power-domains = <&cpg>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + scif0: serial@e8007000 { compatible = "renesas,scif-r7s9210"; reg = <0xe8007000 0x18>; -- 2.23.0