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[24.155.109.49]) by smtp.gmail.com with ESMTPSA id u26sm414885otk.0.2019.12.03.11.27.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 03 Dec 2019 11:27:33 -0800 (PST) Date: Tue, 3 Dec 2019 13:27:33 -0600 From: Rob Herring To: haibo.chen@nxp.com Cc: adrian.hunter@intel.com, ulf.hansson@linaro.org, shawnguo@kernel.org, s.hauer@pengutronix.de, mark.rutland@arm.com, kernel@pengutronix.de, devicetree@vger.kernel.org, festevam@gmail.com, linux-mmc@vger.kernel.org, linux-imx@nxp.com Subject: Re: [PATCH 12/14] doc: dt: fsl-imx-esdhc: add auto-cmd23-broken binding Message-ID: <20191203192733.GA24286@bogus> References: <1573816606-26779-1-git-send-email-haibo.chen@nxp.com> <1573816606-26779-2-git-send-email-haibo.chen@nxp.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1573816606-26779-2-git-send-email-haibo.chen@nxp.com> User-Agent: Mutt/1.10.1 (2018-07-13) Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On Fri, Nov 15, 2019 at 07:16:46PM +0800, haibo.chen@nxp.com wrote: > From: Haibo Chen > > Add fsl,auto-cmd23-broken binding. > > Signed-off-by: Haibo Chen > --- > Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.txt | 8 ++++++++ > 1 file changed, 8 insertions(+) > > diff --git a/Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.txt b/Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.txt > index d50144f5f1d2..a776f418a028 100644 > --- a/Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.txt > +++ b/Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.txt > @@ -43,6 +43,14 @@ Optional properties: > property allows user to change the delay target for the strobe input read clock. > If not use this property, driver default set the delay target to value 7. > Only eMMC HS400 mode need to take care of this property. > +- fsl,auto-cmd23-broken: disable the ACMD23 function of USDHC. > + This is required for eMMC on imx6qpdl/imx6sx/imx7d when it use ADMA mode. Because > + for these SoC, it do not support the ACMD23 completely, only take the 16 bit block > + count from the 0x4 register (BLK_ATT) as argument for the ACMD23, the upper 16 bit > + of the CMD23's argument is ignored. This will impact the reliable write operation > + and the RPMB block write operation, because these operations need to set the bit 31 > + of the CMD23's argument. SDMA mode will default disable the ACMD23 mode. SD card do > + not has this limitation on these SoCs. Use the compatible string or perhaps the version register like the sdhci-esdhc driver does. Rob