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* [PATCH 1/3] ARM: dts: imx6sll: Update usdhc fallback compatible to support HS400 mode
@ 2019-11-06  9:47 Anson Huang
  2019-11-06  9:47 ` [PATCH 2/3] ARM: dts: imx6sll-evk: Add eMMC support Anson Huang
  2019-11-06  9:47 ` [PATCH 3/3] ARM: dts: imx6sll: Add Rev A board support Anson Huang
  0 siblings, 2 replies; 6+ messages in thread
From: Anson Huang @ 2019-11-06  9:47 UTC (permalink / raw)
  To: robh+dt, mark.rutland, shawnguo, s.hauer, kernel, festevam,
	devicetree, linux-arm-kernel, linux-kernel
  Cc: Linux-imx

The latest i.MX6SLL EVK board supports HS400 mode, update usdhc's
fallback compatible to support HS400 mode by default.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
---
 arch/arm/boot/dts/imx6sll.dtsi | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/arch/arm/boot/dts/imx6sll.dtsi b/arch/arm/boot/dts/imx6sll.dtsi
index 85aa8bb..1c8101f 100644
--- a/arch/arm/boot/dts/imx6sll.dtsi
+++ b/arch/arm/boot/dts/imx6sll.dtsi
@@ -698,7 +698,7 @@
 			};
 
 			usdhc1: mmc@2190000 {
-				compatible = "fsl,imx6sll-usdhc", "fsl,imx6sx-usdhc";
+				compatible = "fsl,imx6sll-usdhc", "fsl,imx7d-usdhc";
 				reg = <0x02190000 0x4000>;
 				interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
 				clocks = <&clks IMX6SLL_CLK_USDHC1>,
@@ -712,7 +712,7 @@
 			};
 
 			usdhc2: mmc@2194000 {
-				compatible = "fsl,imx6sll-usdhc", "fsl,imx6sx-usdhc";
+				compatible = "fsl,imx6sll-usdhc", "fsl,imx7d-usdhc";
 				reg = <0x02194000 0x4000>;
 				interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
 				clocks = <&clks IMX6SLL_CLK_USDHC2>,
@@ -726,7 +726,7 @@
 			};
 
 			usdhc3: mmc@2198000 {
-				compatible = "fsl,imx6sll-usdhc", "fsl,imx6sx-usdhc";
+				compatible = "fsl,imx6sll-usdhc", "fsl,imx7d-usdhc";
 				reg = <0x02198000 0x4000>;
 				interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
 				clocks = <&clks IMX6SLL_CLK_USDHC3>,
-- 
2.7.4


^ permalink raw reply related	[flat|nested] 6+ messages in thread

* [PATCH 2/3] ARM: dts: imx6sll-evk: Add eMMC support
  2019-11-06  9:47 [PATCH 1/3] ARM: dts: imx6sll: Update usdhc fallback compatible to support HS400 mode Anson Huang
@ 2019-11-06  9:47 ` Anson Huang
  2019-11-06  9:47 ` [PATCH 3/3] ARM: dts: imx6sll: Add Rev A board support Anson Huang
  1 sibling, 0 replies; 6+ messages in thread
From: Anson Huang @ 2019-11-06  9:47 UTC (permalink / raw)
  To: robh+dt, mark.rutland, shawnguo, s.hauer, kernel, festevam,
	devicetree, linux-arm-kernel, linux-kernel
  Cc: Linux-imx

i.MX6SLL EVK board has eMMC connected on uSDHC2, add support
for it.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
---
 arch/arm/boot/dts/imx6sll-evk.dts | 67 +++++++++++++++++++++++++++++++++++++++
 1 file changed, 67 insertions(+)

diff --git a/arch/arm/boot/dts/imx6sll-evk.dts b/arch/arm/boot/dts/imx6sll-evk.dts
index 3e1d32f..29b284c 100644
--- a/arch/arm/boot/dts/imx6sll-evk.dts
+++ b/arch/arm/boot/dts/imx6sll-evk.dts
@@ -109,6 +109,14 @@
 		enable-active-high;
 	};
 
+	reg_sd2_vmmc: regulator-sd2-vmmc {
+		compatible = "regulator-fixed";
+		regulator-name = "eMMC-VCCQ";
+		regulator-min-microvolt = <1800000>;
+		regulator-max-microvolt = <1800000>;
+		regulator-boot-on;
+	};
+
 	reg_sd3_vmmc: regulator-sd3-vmmc {
 		compatible = "regulator-fixed";
 		pinctrl-names = "default";
@@ -314,6 +322,17 @@
 	status = "okay";
 };
 
+&usdhc2 {
+	pinctrl-names = "default", "state_100mhz", "state_200mhz";
+	pinctrl-0 = <&pinctrl_usdhc2>;
+	pinctrl-1 = <&pinctrl_usdhc2_100mhz>;
+	pinctrl-2 = <&pinctrl_usdhc2_200mhz>;
+	vqmmc-supply = <&reg_sd2_vmmc>;
+	bus-width = <8>;
+	no-removable;
+	status = "okay";
+};
+
 &usdhc3 {
 	pinctrl-names = "default", "state_100mhz", "state_200mhz";
 	pinctrl-0 = <&pinctrl_usdhc3>;
@@ -403,6 +422,54 @@
 		>;
 	};
 
+	pinctrl_usdhc2: usdhc2grp {
+		fsl,pins = <
+			MX6SLL_PAD_SD2_CMD__SD2_CMD		0x17059
+			MX6SLL_PAD_SD2_CLK__SD2_CLK		0x13059
+			MX6SLL_PAD_SD2_DATA0__SD2_DATA0		0x17059
+			MX6SLL_PAD_SD2_DATA1__SD2_DATA1		0x17059
+			MX6SLL_PAD_SD2_DATA2__SD2_DATA2		0x17059
+			MX6SLL_PAD_SD2_DATA3__SD2_DATA3		0x17059
+			MX6SLL_PAD_SD2_DATA4__SD2_DATA4		0x17059
+			MX6SLL_PAD_SD2_DATA5__SD2_DATA5		0x17059
+			MX6SLL_PAD_SD2_DATA6__SD2_DATA6		0x17059
+			MX6SLL_PAD_SD2_DATA7__SD2_DATA7		0x17059
+			MX6SLL_PAD_GPIO4_IO21__SD2_STROBE	0x413059
+		>;
+	};
+
+	pinctrl_usdhc2_100mhz: usdhc2grp_100mhz {
+		fsl,pins = <
+			MX6SLL_PAD_SD2_CMD__SD2_CMD		0x170b9
+			MX6SLL_PAD_SD2_CLK__SD2_CLK		0x130b9
+			MX6SLL_PAD_SD2_DATA0__SD2_DATA0		0x170b9
+			MX6SLL_PAD_SD2_DATA1__SD2_DATA1		0x170b9
+			MX6SLL_PAD_SD2_DATA2__SD2_DATA2		0x170b9
+			MX6SLL_PAD_SD2_DATA3__SD2_DATA3		0x170b9
+			MX6SLL_PAD_SD2_DATA4__SD2_DATA4		0x170b9
+			MX6SLL_PAD_SD2_DATA5__SD2_DATA5		0x170b9
+			MX6SLL_PAD_SD2_DATA6__SD2_DATA6		0x170b9
+			MX6SLL_PAD_SD2_DATA7__SD2_DATA7		0x170b9
+			MX6SLL_PAD_GPIO4_IO21__SD2_STROBE	0x4130b9
+		>;
+	};
+
+	pinctrl_usdhc2_200mhz: usdhc2grp_200mhz {
+		fsl,pins = <
+			MX6SLL_PAD_SD2_CMD__SD2_CMD		0x170f9
+			MX6SLL_PAD_SD2_CLK__SD2_CLK		0x130f9
+			MX6SLL_PAD_SD2_DATA0__SD2_DATA0		0x170f9
+			MX6SLL_PAD_SD2_DATA1__SD2_DATA1		0x170f9
+			MX6SLL_PAD_SD2_DATA2__SD2_DATA2		0x170f9
+			MX6SLL_PAD_SD2_DATA3__SD2_DATA3		0x170f9
+			MX6SLL_PAD_SD2_DATA4__SD2_DATA4		0x170f9
+			MX6SLL_PAD_SD2_DATA5__SD2_DATA5		0x170f9
+			MX6SLL_PAD_SD2_DATA6__SD2_DATA6		0x170f9
+			MX6SLL_PAD_SD2_DATA7__SD2_DATA7		0x170f9
+			MX6SLL_PAD_GPIO4_IO21__SD2_STROBE	0x4130f9
+		>;
+	};
+
 	pinctrl_usbotg1: usbotg1grp {
 		fsl,pins = <
 			MX6SLL_PAD_EPDC_PWR_COM__USB_OTG1_ID 0x17059
-- 
2.7.4


^ permalink raw reply related	[flat|nested] 6+ messages in thread

* [PATCH 3/3] ARM: dts: imx6sll: Add Rev A board support
  2019-11-06  9:47 [PATCH 1/3] ARM: dts: imx6sll: Update usdhc fallback compatible to support HS400 mode Anson Huang
  2019-11-06  9:47 ` [PATCH 2/3] ARM: dts: imx6sll-evk: Add eMMC support Anson Huang
@ 2019-11-06  9:47 ` Anson Huang
  2019-12-04  2:39   ` Shawn Guo
  1 sibling, 1 reply; 6+ messages in thread
From: Anson Huang @ 2019-11-06  9:47 UTC (permalink / raw)
  To: robh+dt, mark.rutland, shawnguo, s.hauer, kernel, festevam,
	devicetree, linux-arm-kernel, linux-kernel
  Cc: Linux-imx

i.MX6SLL EVK Rev A board is same with latest i.MX6SLL EVK board except
eMMC can ONLY run at HS200 mode, add support for this board.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
---
 arch/arm/boot/dts/Makefile             |  1 +
 arch/arm/boot/dts/imx6sll-evk-reva.dts | 12 ++++++++++++
 2 files changed, 13 insertions(+)
 create mode 100644 arch/arm/boot/dts/imx6sll-evk-reva.dts

diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 71f08e7..3845bbf 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -557,6 +557,7 @@ dtb-$(CONFIG_SOC_IMX6SL) += \
 	imx6sl-warp.dtb
 dtb-$(CONFIG_SOC_IMX6SLL) += \
 	imx6sll-evk.dtb \
+	imx6sll-evk-reva.dtb \
 	imx6sll-kobo-clarahd.dtb
 dtb-$(CONFIG_SOC_IMX6SX) += \
 	imx6sx-nitrogen6sx.dtb \
diff --git a/arch/arm/boot/dts/imx6sll-evk-reva.dts b/arch/arm/boot/dts/imx6sll-evk-reva.dts
new file mode 100644
index 0000000..7ca2563
--- /dev/null
+++ b/arch/arm/boot/dts/imx6sll-evk-reva.dts
@@ -0,0 +1,12 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/*
+ * Copyright 2016 Freescale Semiconductor, Inc.
+ * Copyright 2017-2019 NXP.
+ *
+ */
+
+#include "imx6sll-evk.dts"
+
+&usdhc2 {
+	compatible = "fsl,imx6sll-usdhc", "fsl,imx6sx-usdhc";
+};
-- 
2.7.4


^ permalink raw reply related	[flat|nested] 6+ messages in thread

* Re: [PATCH 3/3] ARM: dts: imx6sll: Add Rev A board support
  2019-11-06  9:47 ` [PATCH 3/3] ARM: dts: imx6sll: Add Rev A board support Anson Huang
@ 2019-12-04  2:39   ` Shawn Guo
  2019-12-04  2:52     ` Anson Huang
  0 siblings, 1 reply; 6+ messages in thread
From: Shawn Guo @ 2019-12-04  2:39 UTC (permalink / raw)
  To: Anson Huang
  Cc: robh+dt, mark.rutland, s.hauer, kernel, festevam, devicetree,
	linux-arm-kernel, linux-kernel, Linux-imx

On Wed, Nov 06, 2019 at 05:47:30PM +0800, Anson Huang wrote:
> i.MX6SLL EVK Rev A board is same with latest i.MX6SLL EVK board except
> eMMC can ONLY run at HS200 mode, add support for this board.
> 
> Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
> ---
>  arch/arm/boot/dts/Makefile             |  1 +
>  arch/arm/boot/dts/imx6sll-evk-reva.dts | 12 ++++++++++++
>  2 files changed, 13 insertions(+)
>  create mode 100644 arch/arm/boot/dts/imx6sll-evk-reva.dts
> 
> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> index 71f08e7..3845bbf 100644
> --- a/arch/arm/boot/dts/Makefile
> +++ b/arch/arm/boot/dts/Makefile
> @@ -557,6 +557,7 @@ dtb-$(CONFIG_SOC_IMX6SL) += \
>  	imx6sl-warp.dtb
>  dtb-$(CONFIG_SOC_IMX6SLL) += \
>  	imx6sll-evk.dtb \
> +	imx6sll-evk-reva.dtb \
>  	imx6sll-kobo-clarahd.dtb
>  dtb-$(CONFIG_SOC_IMX6SX) += \
>  	imx6sx-nitrogen6sx.dtb \
> diff --git a/arch/arm/boot/dts/imx6sll-evk-reva.dts b/arch/arm/boot/dts/imx6sll-evk-reva.dts
> new file mode 100644
> index 0000000..7ca2563
> --- /dev/null
> +++ b/arch/arm/boot/dts/imx6sll-evk-reva.dts
> @@ -0,0 +1,12 @@
> +// SPDX-License-Identifier: (GPL-2.0 OR MIT)
> +/*
> + * Copyright 2016 Freescale Semiconductor, Inc.
> + * Copyright 2017-2019 NXP.
> + *
> + */
> +
> +#include "imx6sll-evk.dts"
> +
> +&usdhc2 {
> +	compatible = "fsl,imx6sll-usdhc", "fsl,imx6sx-usdhc";

It looks odd to me that we need to deal with a board level difference
with a SoC level compatible.  The USDHC compatible should be solely
determined by the IP programming model, not the board level capability.

Shawn

> +};
> -- 
> 2.7.4
> 

^ permalink raw reply	[flat|nested] 6+ messages in thread

* RE: [PATCH 3/3] ARM: dts: imx6sll: Add Rev A board support
  2019-12-04  2:39   ` Shawn Guo
@ 2019-12-04  2:52     ` Anson Huang
  2019-12-04  3:39       ` Shawn Guo
  0 siblings, 1 reply; 6+ messages in thread
From: Anson Huang @ 2019-12-04  2:52 UTC (permalink / raw)
  To: Shawn Guo
  Cc: robh+dt, mark.rutland, s.hauer, kernel, festevam, devicetree,
	linux-arm-kernel, linux-kernel, dl-linux-imx



> Subject: Re: [PATCH 3/3] ARM: dts: imx6sll: Add Rev A board support
> 
> On Wed, Nov 06, 2019 at 05:47:30PM +0800, Anson Huang wrote:
> > i.MX6SLL EVK Rev A board is same with latest i.MX6SLL EVK board except
> > eMMC can ONLY run at HS200 mode, add support for this board.
> >
> > Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
> > ---
> >  arch/arm/boot/dts/Makefile             |  1 +
> >  arch/arm/boot/dts/imx6sll-evk-reva.dts | 12 ++++++++++++
> >  2 files changed, 13 insertions(+)
> >  create mode 100644 arch/arm/boot/dts/imx6sll-evk-reva.dts
> >
> > diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> > index 71f08e7..3845bbf 100644
> > --- a/arch/arm/boot/dts/Makefile
> > +++ b/arch/arm/boot/dts/Makefile
> > @@ -557,6 +557,7 @@ dtb-$(CONFIG_SOC_IMX6SL) += \
> >  	imx6sl-warp.dtb
> >  dtb-$(CONFIG_SOC_IMX6SLL) += \
> >  	imx6sll-evk.dtb \
> > +	imx6sll-evk-reva.dtb \
> >  	imx6sll-kobo-clarahd.dtb
> >  dtb-$(CONFIG_SOC_IMX6SX) += \
> >  	imx6sx-nitrogen6sx.dtb \
> > diff --git a/arch/arm/boot/dts/imx6sll-evk-reva.dts
> > b/arch/arm/boot/dts/imx6sll-evk-reva.dts
> > new file mode 100644
> > index 0000000..7ca2563
> > --- /dev/null
> > +++ b/arch/arm/boot/dts/imx6sll-evk-reva.dts
> > @@ -0,0 +1,12 @@
> > +// SPDX-License-Identifier: (GPL-2.0 OR MIT)
> > +/*
> > + * Copyright 2016 Freescale Semiconductor, Inc.
> > + * Copyright 2017-2019 NXP.
> > + *
> > + */
> > +
> > +#include "imx6sll-evk.dts"
> > +
> > +&usdhc2 {
> > +	compatible = "fsl,imx6sll-usdhc", "fsl,imx6sx-usdhc";
> 
> It looks odd to me that we need to deal with a board level difference with a
> SoC level compatible.  The USDHC compatible should be solely determined by
> the IP programming model, not the board level capability.

So how to handle such scenario? Current usdhc driver uses SoC compatible to distinguish
different functions of uSDHC IP, if some boards can NOT support dedicated function due to
board design regardless of the IP inside, the easy way is just to downgrade the SoC compatible,
or need uSDHC driver to provide some DT properties for such case? 

Thanks,
Anson 

^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: [PATCH 3/3] ARM: dts: imx6sll: Add Rev A board support
  2019-12-04  2:52     ` Anson Huang
@ 2019-12-04  3:39       ` Shawn Guo
  0 siblings, 0 replies; 6+ messages in thread
From: Shawn Guo @ 2019-12-04  3:39 UTC (permalink / raw)
  To: Anson Huang
  Cc: robh+dt, mark.rutland, s.hauer, kernel, festevam, devicetree,
	linux-arm-kernel, linux-kernel, dl-linux-imx

On Wed, Dec 04, 2019 at 02:52:11AM +0000, Anson Huang wrote:
> 
> 
> > Subject: Re: [PATCH 3/3] ARM: dts: imx6sll: Add Rev A board support
> > 
> > On Wed, Nov 06, 2019 at 05:47:30PM +0800, Anson Huang wrote:
> > > i.MX6SLL EVK Rev A board is same with latest i.MX6SLL EVK board except
> > > eMMC can ONLY run at HS200 mode, add support for this board.
> > >
> > > Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
> > > ---
> > >  arch/arm/boot/dts/Makefile             |  1 +
> > >  arch/arm/boot/dts/imx6sll-evk-reva.dts | 12 ++++++++++++
> > >  2 files changed, 13 insertions(+)
> > >  create mode 100644 arch/arm/boot/dts/imx6sll-evk-reva.dts
> > >
> > > diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> > > index 71f08e7..3845bbf 100644
> > > --- a/arch/arm/boot/dts/Makefile
> > > +++ b/arch/arm/boot/dts/Makefile
> > > @@ -557,6 +557,7 @@ dtb-$(CONFIG_SOC_IMX6SL) += \
> > >  	imx6sl-warp.dtb
> > >  dtb-$(CONFIG_SOC_IMX6SLL) += \
> > >  	imx6sll-evk.dtb \
> > > +	imx6sll-evk-reva.dtb \
> > >  	imx6sll-kobo-clarahd.dtb
> > >  dtb-$(CONFIG_SOC_IMX6SX) += \
> > >  	imx6sx-nitrogen6sx.dtb \
> > > diff --git a/arch/arm/boot/dts/imx6sll-evk-reva.dts
> > > b/arch/arm/boot/dts/imx6sll-evk-reva.dts
> > > new file mode 100644
> > > index 0000000..7ca2563
> > > --- /dev/null
> > > +++ b/arch/arm/boot/dts/imx6sll-evk-reva.dts
> > > @@ -0,0 +1,12 @@
> > > +// SPDX-License-Identifier: (GPL-2.0 OR MIT)
> > > +/*
> > > + * Copyright 2016 Freescale Semiconductor, Inc.
> > > + * Copyright 2017-2019 NXP.
> > > + *
> > > + */
> > > +
> > > +#include "imx6sll-evk.dts"
> > > +
> > > +&usdhc2 {
> > > +	compatible = "fsl,imx6sll-usdhc", "fsl,imx6sx-usdhc";
> > 
> > It looks odd to me that we need to deal with a board level difference with a
> > SoC level compatible.  The USDHC compatible should be solely determined by
> > the IP programming model, not the board level capability.
> 
> So how to handle such scenario? Current usdhc driver uses SoC compatible to distinguish
> different functions of uSDHC IP, if some boards can NOT support dedicated function due to
> board design regardless of the IP inside, the easy way is just to downgrade the SoC compatible,
> or need uSDHC driver to provide some DT properties for such case? 

So you are saying this is a complete board design limitation, not SoC/IP
related?  In that case, IMO, we need a board level DT property to deal
with it.

Shawn

^ permalink raw reply	[flat|nested] 6+ messages in thread

end of thread, other threads:[~2019-12-04  3:39 UTC | newest]

Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2019-11-06  9:47 [PATCH 1/3] ARM: dts: imx6sll: Update usdhc fallback compatible to support HS400 mode Anson Huang
2019-11-06  9:47 ` [PATCH 2/3] ARM: dts: imx6sll-evk: Add eMMC support Anson Huang
2019-11-06  9:47 ` [PATCH 3/3] ARM: dts: imx6sll: Add Rev A board support Anson Huang
2019-12-04  2:39   ` Shawn Guo
2019-12-04  2:52     ` Anson Huang
2019-12-04  3:39       ` Shawn Guo

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