* [PATCH 0/2] phy: qcom-qmp: Add MSM8996 UFS QMP support @ 2019-12-07 20:21 Bjorn Andersson 2019-12-07 20:21 ` [PATCH 1/2] " Bjorn Andersson 2019-12-07 20:21 ` [PATCH 2/2] arm64: dts: qcom: msm8996: Use generic QMP driver for UFS Bjorn Andersson 0 siblings, 2 replies; 7+ messages in thread From: Bjorn Andersson @ 2019-12-07 20:21 UTC (permalink / raw) To: Kishon Vijay Abraham I Cc: Andy Gross, Rob Herring, Mark Rutland, linux-arm-msm, linux-kernel, devicetree, vinod.koul This adds support for the 14nm UFS PHY found in MSM8996 to the common QMP PHY driver and migrates the msm8996 dts to the new binding, which will allow us to remove the old driver (and the broken 20nm driver). Bjorn Andersson (2): phy: qcom-qmp: Add MSM8996 UFS QMP support arm64: dts: qcom: msm8996: Use generic QMP driver for UFS .../devicetree/bindings/phy/qcom-qmp-phy.txt | 5 + arch/arm64/boot/dts/qcom/msm8996.dtsi | 33 +++--- drivers/phy/qualcomm/phy-qcom-qmp.c | 106 ++++++++++++++++++ 3 files changed, 129 insertions(+), 15 deletions(-) -- 2.24.0 ^ permalink raw reply [flat|nested] 7+ messages in thread
* [PATCH 1/2] phy: qcom-qmp: Add MSM8996 UFS QMP support 2019-12-07 20:21 [PATCH 0/2] phy: qcom-qmp: Add MSM8996 UFS QMP support Bjorn Andersson @ 2019-12-07 20:21 ` Bjorn Andersson 2019-12-18 23:42 ` Rob Herring 2019-12-19 4:20 ` Vinod Koul 2019-12-07 20:21 ` [PATCH 2/2] arm64: dts: qcom: msm8996: Use generic QMP driver for UFS Bjorn Andersson 1 sibling, 2 replies; 7+ messages in thread From: Bjorn Andersson @ 2019-12-07 20:21 UTC (permalink / raw) To: Kishon Vijay Abraham I, Rob Herring, Mark Rutland Cc: Andy Gross, linux-arm-msm, linux-kernel, devicetree, vinod.koul The support for the 14nm MSM8996 UFS PHY is currently handled by the UFS-specific 14nm QMP driver, due to the earlier need for additional operations beyond the standard PHY API. Add support for this PHY to the common QMP driver, to allow us to remove the old driver. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> --- .../devicetree/bindings/phy/qcom-qmp-phy.txt | 5 + drivers/phy/qualcomm/phy-qcom-qmp.c | 106 ++++++++++++++++++ 2 files changed, 111 insertions(+) diff --git a/Documentation/devicetree/bindings/phy/qcom-qmp-phy.txt b/Documentation/devicetree/bindings/phy/qcom-qmp-phy.txt index eac9ad3cbbc8..5b99cf081817 100644 --- a/Documentation/devicetree/bindings/phy/qcom-qmp-phy.txt +++ b/Documentation/devicetree/bindings/phy/qcom-qmp-phy.txt @@ -8,6 +8,7 @@ Required properties: - compatible: compatible list, contains: "qcom,ipq8074-qmp-pcie-phy" for PCIe phy on IPQ8074 "qcom,msm8996-qmp-pcie-phy" for 14nm PCIe phy on msm8996, + "qcom,msm8996-qmp-ufs-phy" for 14nm UFS phy on msm8996, "qcom,msm8996-qmp-usb3-phy" for 14nm USB3 phy on msm8996, "qcom,msm8998-qmp-usb3-phy" for USB3 QMP V3 phy on msm8998, "qcom,msm8998-qmp-ufs-phy" for UFS QMP phy on msm8998, @@ -44,6 +45,8 @@ Required properties: For "qcom,ipq8074-qmp-pcie-phy": no clocks are listed. For "qcom,msm8996-qmp-pcie-phy" must contain: "aux", "cfg_ahb", "ref". + For "qcom,msm8996-qmp-ufs-phy" must contain: + "ref". For "qcom,msm8996-qmp-usb3-phy" must contain: "aux", "cfg_ahb", "ref". For "qcom,msm8998-qmp-usb3-phy" must contain: @@ -72,6 +75,8 @@ Required properties: "phy", "common". For "qcom,msm8996-qmp-pcie-phy" must contain: "phy", "common", "cfg". + For "qcom,msm8996-qmp-ufs-phy": must contain: + "ufsphy". For "qcom,msm8996-qmp-usb3-phy" must contain "phy", "common". For "qcom,msm8998-qmp-usb3-phy" must contain diff --git a/drivers/phy/qualcomm/phy-qcom-qmp.c b/drivers/phy/qualcomm/phy-qcom-qmp.c index a6b8fc5798e2..d81516c4d747 100644 --- a/drivers/phy/qualcomm/phy-qcom-qmp.c +++ b/drivers/phy/qualcomm/phy-qcom-qmp.c @@ -121,6 +121,11 @@ enum qphy_reg_layout { QPHY_PCS_LFPS_RXTERM_IRQ_STATUS, }; +static const unsigned int msm8996_ufsphy_regs_layout[] = { + [QPHY_START_CTRL] = 0x00, + [QPHY_PCS_READY_STATUS] = 0x168, +}; + static const unsigned int pciephy_regs_layout[] = { [QPHY_COM_SW_RESET] = 0x400, [QPHY_COM_POWER_DOWN_CONTROL] = 0x404, @@ -330,6 +335,75 @@ static const struct qmp_phy_init_tbl msm8998_pcie_pcs_tbl[] = { QMP_PHY_INIT_CFG(QPHY_V3_PCS_SIGDET_CNTRL, 0x03), }; +static const struct qmp_phy_init_tbl msm8996_ufs_serdes_tbl[] = { + QMP_PHY_INIT_CFG(QPHY_POWER_DOWN_CONTROL, 0x01), + QMP_PHY_INIT_CFG(QSERDES_COM_CMN_CONFIG, 0x0e), + QMP_PHY_INIT_CFG(QSERDES_COM_SYSCLK_EN_SEL, 0xd7), + QMP_PHY_INIT_CFG(QSERDES_COM_CLK_SELECT, 0x30), + QMP_PHY_INIT_CFG(QSERDES_COM_SYS_CLK_CTRL, 0x06), + QMP_PHY_INIT_CFG(QSERDES_COM_BIAS_EN_CLKBUFLR_EN, 0x08), + QMP_PHY_INIT_CFG(QSERDES_COM_BG_TIMER, 0x0a), + QMP_PHY_INIT_CFG(QSERDES_COM_HSCLK_SEL, 0x05), + QMP_PHY_INIT_CFG(QSERDES_COM_CORECLK_DIV, 0x0a), + QMP_PHY_INIT_CFG(QSERDES_COM_CORECLK_DIV_MODE1, 0x0a), + QMP_PHY_INIT_CFG(QSERDES_COM_LOCK_CMP_EN, 0x01), + QMP_PHY_INIT_CFG(QSERDES_COM_VCO_TUNE_CTRL, 0x10), + QMP_PHY_INIT_CFG(QSERDES_COM_RESETSM_CNTRL, 0x20), + QMP_PHY_INIT_CFG(QSERDES_COM_CORE_CLK_EN, 0x00), + QMP_PHY_INIT_CFG(QSERDES_COM_LOCK_CMP_CFG, 0x00), + QMP_PHY_INIT_CFG(QSERDES_COM_VCO_TUNE_TIMER1, 0xff), + QMP_PHY_INIT_CFG(QSERDES_COM_VCO_TUNE_TIMER2, 0x3f), + QMP_PHY_INIT_CFG(QSERDES_COM_VCO_TUNE_MAP, 0x54), + QMP_PHY_INIT_CFG(QSERDES_COM_SVS_MODE_CLK_SEL, 0x05), + QMP_PHY_INIT_CFG(QSERDES_COM_DEC_START_MODE0, 0x82), + QMP_PHY_INIT_CFG(QSERDES_COM_DIV_FRAC_START1_MODE0, 0x00), + QMP_PHY_INIT_CFG(QSERDES_COM_DIV_FRAC_START2_MODE0, 0x00), + QMP_PHY_INIT_CFG(QSERDES_COM_DIV_FRAC_START3_MODE0, 0x00), + QMP_PHY_INIT_CFG(QSERDES_COM_CP_CTRL_MODE0, 0x0b), + QMP_PHY_INIT_CFG(QSERDES_COM_PLL_RCTRL_MODE0, 0x16), + QMP_PHY_INIT_CFG(QSERDES_COM_PLL_CCTRL_MODE0, 0x28), + QMP_PHY_INIT_CFG(QSERDES_COM_INTEGLOOP_GAIN0_MODE0, 0x80), + QMP_PHY_INIT_CFG(QSERDES_COM_INTEGLOOP_GAIN1_MODE0, 0x00), + QMP_PHY_INIT_CFG(QSERDES_COM_VCO_TUNE1_MODE0, 0x28), + QMP_PHY_INIT_CFG(QSERDES_COM_VCO_TUNE2_MODE0, 0x02), + QMP_PHY_INIT_CFG(QSERDES_COM_LOCK_CMP1_MODE0, 0xff), + QMP_PHY_INIT_CFG(QSERDES_COM_LOCK_CMP2_MODE0, 0x0c), + QMP_PHY_INIT_CFG(QSERDES_COM_LOCK_CMP3_MODE0, 0x00), + QMP_PHY_INIT_CFG(QSERDES_COM_DEC_START_MODE1, 0x98), + QMP_PHY_INIT_CFG(QSERDES_COM_DIV_FRAC_START1_MODE1, 0x00), + QMP_PHY_INIT_CFG(QSERDES_COM_DIV_FRAC_START2_MODE1, 0x00), + QMP_PHY_INIT_CFG(QSERDES_COM_DIV_FRAC_START3_MODE1, 0x00), + QMP_PHY_INIT_CFG(QSERDES_COM_CP_CTRL_MODE1, 0x0b), + QMP_PHY_INIT_CFG(QSERDES_COM_PLL_RCTRL_MODE1, 0x16), + QMP_PHY_INIT_CFG(QSERDES_COM_PLL_CCTRL_MODE1, 0x28), + QMP_PHY_INIT_CFG(QSERDES_COM_INTEGLOOP_GAIN0_MODE1, 0x80), + QMP_PHY_INIT_CFG(QSERDES_COM_INTEGLOOP_GAIN1_MODE1, 0x00), + QMP_PHY_INIT_CFG(QSERDES_COM_VCO_TUNE1_MODE1, 0xd6), + QMP_PHY_INIT_CFG(QSERDES_COM_VCO_TUNE2_MODE1, 0x00), + QMP_PHY_INIT_CFG(QSERDES_COM_LOCK_CMP1_MODE1, 0x32), + QMP_PHY_INIT_CFG(QSERDES_COM_LOCK_CMP2_MODE1, 0x0f), + QMP_PHY_INIT_CFG(QSERDES_COM_LOCK_CMP3_MODE1, 0x00), +}; + +static const struct qmp_phy_init_tbl msm8996_ufs_tx_tbl[] = { + QMP_PHY_INIT_CFG(QSERDES_TX_HIGHZ_TRANSCEIVEREN_BIAS_DRVR_EN, 0x45), + QMP_PHY_INIT_CFG(QSERDES_TX_LANE_MODE, 0x02), +}; + +static const struct qmp_phy_init_tbl msm8996_ufs_rx_tbl[] = { + QMP_PHY_INIT_CFG(QSERDES_RX_SIGDET_LVL, 0x24), + QMP_PHY_INIT_CFG(QSERDES_RX_SIGDET_CNTRL, 0x02), + QMP_PHY_INIT_CFG(QSERDES_RX_RX_INTERFACE_MODE, 0x00), + QMP_PHY_INIT_CFG(QSERDES_RX_SIGDET_DEGLITCH_CNTRL, 0x18), + QMP_PHY_INIT_CFG(QSERDES_RX_UCDR_FASTLOCK_FO_GAIN, 0x0B), + QMP_PHY_INIT_CFG(QSERDES_RX_RX_TERM_BW, 0x5b), + QMP_PHY_INIT_CFG(QSERDES_RX_RX_EQ_GAIN1_LSB, 0xff), + QMP_PHY_INIT_CFG(QSERDES_RX_RX_EQ_GAIN1_MSB, 0x3f), + QMP_PHY_INIT_CFG(QSERDES_RX_RX_EQ_GAIN2_LSB, 0xff), + QMP_PHY_INIT_CFG(QSERDES_RX_RX_EQ_GAIN2_MSB, 0x0f), + QMP_PHY_INIT_CFG(QSERDES_RX_RX_EQU_ADAPTOR_CNTRL2, 0x0E), +}; + static const struct qmp_phy_init_tbl msm8996_usb3_serdes_tbl[] = { QMP_PHY_INIT_CFG(QSERDES_COM_SYSCLK_EN_SEL, 0x14), QMP_PHY_INIT_CFG(QSERDES_COM_BIAS_EN_CLKBUFLR_EN, 0x08), @@ -1122,6 +1196,10 @@ static const char * const msm8996_phy_clk_l[] = { "aux", "cfg_ahb", "ref", }; +static const char * const msm8996_ufs_phy_clk_l[] = { + "ref", +}; + static const char * const qmp_v3_phy_clk_l[] = { "aux", "cfg_ahb", "ref", "com_aux", }; @@ -1175,6 +1253,31 @@ static const struct qmp_phy_cfg msm8996_pciephy_cfg = { .pwrdn_delay_max = POWER_DOWN_DELAY_US_MAX, }; +static const struct qmp_phy_cfg msm8996_ufs_cfg = { + .type = PHY_TYPE_UFS, + .nlanes = 1, + + .serdes_tbl = msm8996_ufs_serdes_tbl, + .serdes_tbl_num = ARRAY_SIZE(msm8996_ufs_serdes_tbl), + .tx_tbl = msm8996_ufs_tx_tbl, + .tx_tbl_num = ARRAY_SIZE(msm8996_ufs_tx_tbl), + .rx_tbl = msm8996_ufs_rx_tbl, + .rx_tbl_num = ARRAY_SIZE(msm8996_ufs_rx_tbl), + + .clk_list = msm8996_ufs_phy_clk_l, + .num_clks = ARRAY_SIZE(msm8996_ufs_phy_clk_l), + + .vreg_list = qmp_phy_vreg_l, + .num_vregs = ARRAY_SIZE(qmp_phy_vreg_l), + + .regs = msm8996_ufsphy_regs_layout, + + .start_ctrl = SERDES_START, + .pwrdn_ctrl = SW_PWRDN, + + .no_pcs_sw_reset = true, +}; + static const struct qmp_phy_cfg msm8996_usb3phy_cfg = { .type = PHY_TYPE_USB3, .nlanes = 1, @@ -2091,6 +2194,9 @@ static const struct of_device_id qcom_qmp_phy_of_match_table[] = { { .compatible = "qcom,msm8996-qmp-pcie-phy", .data = &msm8996_pciephy_cfg, + }, { + .compatible = "qcom,msm8996-qmp-ufs-phy", + .data = &msm8996_ufs_cfg, }, { .compatible = "qcom,msm8996-qmp-usb3-phy", .data = &msm8996_usb3phy_cfg, -- 2.24.0 ^ permalink raw reply related [flat|nested] 7+ messages in thread
* Re: [PATCH 1/2] phy: qcom-qmp: Add MSM8996 UFS QMP support 2019-12-07 20:21 ` [PATCH 1/2] " Bjorn Andersson @ 2019-12-18 23:42 ` Rob Herring 2019-12-19 4:20 ` Vinod Koul 1 sibling, 0 replies; 7+ messages in thread From: Rob Herring @ 2019-12-18 23:42 UTC (permalink / raw) To: Bjorn Andersson Cc: Kishon Vijay Abraham I, Mark Rutland, Andy Gross, linux-arm-msm, linux-kernel, devicetree, vinod.koul On Sat, 7 Dec 2019 12:21:46 -0800, Bjorn Andersson wrote: > The support for the 14nm MSM8996 UFS PHY is currently handled by the > UFS-specific 14nm QMP driver, due to the earlier need for additional > operations beyond the standard PHY API. > > Add support for this PHY to the common QMP driver, to allow us to remove > the old driver. > > Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> > --- > .../devicetree/bindings/phy/qcom-qmp-phy.txt | 5 + > drivers/phy/qualcomm/phy-qcom-qmp.c | 106 ++++++++++++++++++ > 2 files changed, 111 insertions(+) > Acked-by: Rob Herring <robh@kernel.org> ^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH 1/2] phy: qcom-qmp: Add MSM8996 UFS QMP support 2019-12-07 20:21 ` [PATCH 1/2] " Bjorn Andersson 2019-12-18 23:42 ` Rob Herring @ 2019-12-19 4:20 ` Vinod Koul 2019-12-19 7:06 ` Bjorn Andersson 1 sibling, 1 reply; 7+ messages in thread From: Vinod Koul @ 2019-12-19 4:20 UTC (permalink / raw) To: Bjorn Andersson Cc: Kishon Vijay Abraham I, Rob Herring, Mark Rutland, Andy Gross, linux-arm-msm, linux-kernel, devicetree On 07-12-19, 12:21, Bjorn Andersson wrote: > The support for the 14nm MSM8996 UFS PHY is currently handled by the > UFS-specific 14nm QMP driver, due to the earlier need for additional > operations beyond the standard PHY API. > > Add support for this PHY to the common QMP driver, to allow us to remove > the old driver. > > Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> > --- > .../devicetree/bindings/phy/qcom-qmp-phy.txt | 5 + > drivers/phy/qualcomm/phy-qcom-qmp.c | 106 ++++++++++++++++++ > 2 files changed, 111 insertions(+) > > diff --git a/Documentation/devicetree/bindings/phy/qcom-qmp-phy.txt b/Documentation/devicetree/bindings/phy/qcom-qmp-phy.txt > index eac9ad3cbbc8..5b99cf081817 100644 > --- a/Documentation/devicetree/bindings/phy/qcom-qmp-phy.txt > +++ b/Documentation/devicetree/bindings/phy/qcom-qmp-phy.txt > @@ -8,6 +8,7 @@ Required properties: > - compatible: compatible list, contains: > "qcom,ipq8074-qmp-pcie-phy" for PCIe phy on IPQ8074 > "qcom,msm8996-qmp-pcie-phy" for 14nm PCIe phy on msm8996, > + "qcom,msm8996-qmp-ufs-phy" for 14nm UFS phy on msm8996, > "qcom,msm8996-qmp-usb3-phy" for 14nm USB3 phy on msm8996, > "qcom,msm8998-qmp-usb3-phy" for USB3 QMP V3 phy on msm8998, > "qcom,msm8998-qmp-ufs-phy" for UFS QMP phy on msm8998, > @@ -44,6 +45,8 @@ Required properties: > For "qcom,ipq8074-qmp-pcie-phy": no clocks are listed. > For "qcom,msm8996-qmp-pcie-phy" must contain: > "aux", "cfg_ahb", "ref". > + For "qcom,msm8996-qmp-ufs-phy" must contain: > + "ref". > For "qcom,msm8996-qmp-usb3-phy" must contain: > "aux", "cfg_ahb", "ref". > For "qcom,msm8998-qmp-usb3-phy" must contain: > @@ -72,6 +75,8 @@ Required properties: > "phy", "common". > For "qcom,msm8996-qmp-pcie-phy" must contain: > "phy", "common", "cfg". > + For "qcom,msm8996-qmp-ufs-phy": must contain: > + "ufsphy". > For "qcom,msm8996-qmp-usb3-phy" must contain > "phy", "common". > For "qcom,msm8998-qmp-usb3-phy" must contain > diff --git a/drivers/phy/qualcomm/phy-qcom-qmp.c b/drivers/phy/qualcomm/phy-qcom-qmp.c > index a6b8fc5798e2..d81516c4d747 100644 > --- a/drivers/phy/qualcomm/phy-qcom-qmp.c > +++ b/drivers/phy/qualcomm/phy-qcom-qmp.c > @@ -121,6 +121,11 @@ enum qphy_reg_layout { > QPHY_PCS_LFPS_RXTERM_IRQ_STATUS, > }; > > +static const unsigned int msm8996_ufsphy_regs_layout[] = { > + [QPHY_START_CTRL] = 0x00, > + [QPHY_PCS_READY_STATUS] = 0x168, > +}; > + > static const unsigned int pciephy_regs_layout[] = { > [QPHY_COM_SW_RESET] = 0x400, > [QPHY_COM_POWER_DOWN_CONTROL] = 0x404, > @@ -330,6 +335,75 @@ static const struct qmp_phy_init_tbl msm8998_pcie_pcs_tbl[] = { > QMP_PHY_INIT_CFG(QPHY_V3_PCS_SIGDET_CNTRL, 0x03), > }; > > +static const struct qmp_phy_init_tbl msm8996_ufs_serdes_tbl[] = { > + QMP_PHY_INIT_CFG(QPHY_POWER_DOWN_CONTROL, 0x01), Can you check this after adding the reset for ufs, I suspect you might run into same issue as I am seeing on 8150, power down here does not seem correct. -- ~Vinod ^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH 1/2] phy: qcom-qmp: Add MSM8996 UFS QMP support 2019-12-19 4:20 ` Vinod Koul @ 2019-12-19 7:06 ` Bjorn Andersson 2019-12-19 13:48 ` Vinod Koul 0 siblings, 1 reply; 7+ messages in thread From: Bjorn Andersson @ 2019-12-19 7:06 UTC (permalink / raw) To: Vinod Koul Cc: Kishon Vijay Abraham I, Rob Herring, Mark Rutland, Andy Gross, linux-arm-msm, linux-kernel, devicetree On Wed 18 Dec 20:20 PST 2019, Vinod Koul wrote: > On 07-12-19, 12:21, Bjorn Andersson wrote: > > The support for the 14nm MSM8996 UFS PHY is currently handled by the > > UFS-specific 14nm QMP driver, due to the earlier need for additional > > operations beyond the standard PHY API. > > > > Add support for this PHY to the common QMP driver, to allow us to remove > > the old driver. > > > > Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> > > --- > > .../devicetree/bindings/phy/qcom-qmp-phy.txt | 5 + > > drivers/phy/qualcomm/phy-qcom-qmp.c | 106 ++++++++++++++++++ > > 2 files changed, 111 insertions(+) > > > > diff --git a/Documentation/devicetree/bindings/phy/qcom-qmp-phy.txt b/Documentation/devicetree/bindings/phy/qcom-qmp-phy.txt > > index eac9ad3cbbc8..5b99cf081817 100644 > > --- a/Documentation/devicetree/bindings/phy/qcom-qmp-phy.txt > > +++ b/Documentation/devicetree/bindings/phy/qcom-qmp-phy.txt > > @@ -8,6 +8,7 @@ Required properties: > > - compatible: compatible list, contains: > > "qcom,ipq8074-qmp-pcie-phy" for PCIe phy on IPQ8074 > > "qcom,msm8996-qmp-pcie-phy" for 14nm PCIe phy on msm8996, > > + "qcom,msm8996-qmp-ufs-phy" for 14nm UFS phy on msm8996, > > "qcom,msm8996-qmp-usb3-phy" for 14nm USB3 phy on msm8996, > > "qcom,msm8998-qmp-usb3-phy" for USB3 QMP V3 phy on msm8998, > > "qcom,msm8998-qmp-ufs-phy" for UFS QMP phy on msm8998, > > @@ -44,6 +45,8 @@ Required properties: > > For "qcom,ipq8074-qmp-pcie-phy": no clocks are listed. > > For "qcom,msm8996-qmp-pcie-phy" must contain: > > "aux", "cfg_ahb", "ref". > > + For "qcom,msm8996-qmp-ufs-phy" must contain: > > + "ref". > > For "qcom,msm8996-qmp-usb3-phy" must contain: > > "aux", "cfg_ahb", "ref". > > For "qcom,msm8998-qmp-usb3-phy" must contain: > > @@ -72,6 +75,8 @@ Required properties: > > "phy", "common". > > For "qcom,msm8996-qmp-pcie-phy" must contain: > > "phy", "common", "cfg". > > + For "qcom,msm8996-qmp-ufs-phy": must contain: > > + "ufsphy". > > For "qcom,msm8996-qmp-usb3-phy" must contain > > "phy", "common". > > For "qcom,msm8998-qmp-usb3-phy" must contain > > diff --git a/drivers/phy/qualcomm/phy-qcom-qmp.c b/drivers/phy/qualcomm/phy-qcom-qmp.c > > index a6b8fc5798e2..d81516c4d747 100644 > > --- a/drivers/phy/qualcomm/phy-qcom-qmp.c > > +++ b/drivers/phy/qualcomm/phy-qcom-qmp.c > > @@ -121,6 +121,11 @@ enum qphy_reg_layout { > > QPHY_PCS_LFPS_RXTERM_IRQ_STATUS, > > }; > > > > +static const unsigned int msm8996_ufsphy_regs_layout[] = { > > + [QPHY_START_CTRL] = 0x00, > > + [QPHY_PCS_READY_STATUS] = 0x168, > > +}; > > + > > static const unsigned int pciephy_regs_layout[] = { > > [QPHY_COM_SW_RESET] = 0x400, > > [QPHY_COM_POWER_DOWN_CONTROL] = 0x404, > > @@ -330,6 +335,75 @@ static const struct qmp_phy_init_tbl msm8998_pcie_pcs_tbl[] = { > > QMP_PHY_INIT_CFG(QPHY_V3_PCS_SIGDET_CNTRL, 0x03), > > }; > > > > +static const struct qmp_phy_init_tbl msm8996_ufs_serdes_tbl[] = { > > + QMP_PHY_INIT_CFG(QPHY_POWER_DOWN_CONTROL, 0x01), > > Can you check this after adding the reset for ufs, I suspect you might > run into same issue as I am seeing on 8150, power down here does not > seem correct. > I'm not sure why we need to tickle POWER_DOWN here, but it's documented as such, done in the old driver and without it the PHY does not come up. Regards, Bjorn ^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH 1/2] phy: qcom-qmp: Add MSM8996 UFS QMP support 2019-12-19 7:06 ` Bjorn Andersson @ 2019-12-19 13:48 ` Vinod Koul 0 siblings, 0 replies; 7+ messages in thread From: Vinod Koul @ 2019-12-19 13:48 UTC (permalink / raw) To: Bjorn Andersson Cc: Kishon Vijay Abraham I, Rob Herring, Mark Rutland, Andy Gross, linux-arm-msm, linux-kernel, devicetree On 18-12-19, 23:06, Bjorn Andersson wrote: > On Wed 18 Dec 20:20 PST 2019, Vinod Koul wrote: > > > On 07-12-19, 12:21, Bjorn Andersson wrote: > > > static const unsigned int pciephy_regs_layout[] = { > > > [QPHY_COM_SW_RESET] = 0x400, > > > [QPHY_COM_POWER_DOWN_CONTROL] = 0x404, > > > @@ -330,6 +335,75 @@ static const struct qmp_phy_init_tbl msm8998_pcie_pcs_tbl[] = { > > > QMP_PHY_INIT_CFG(QPHY_V3_PCS_SIGDET_CNTRL, 0x03), > > > }; > > > > > > +static const struct qmp_phy_init_tbl msm8996_ufs_serdes_tbl[] = { > > > + QMP_PHY_INIT_CFG(QPHY_POWER_DOWN_CONTROL, 0x01), > > > > Can you check this after adding the reset for ufs, I suspect you might > > run into same issue as I am seeing on 8150, power down here does not > > seem correct. > > > > I'm not sure why we need to tickle POWER_DOWN here, but it's documented > as such, done in the old driver and without it the PHY does not come up. I checked and you *may* leave this as is. The register write preceding this is same, so we are writing twice, but does not seem have any side effect so we can keep it here :) -- ~Vinod ^ permalink raw reply [flat|nested] 7+ messages in thread
* [PATCH 2/2] arm64: dts: qcom: msm8996: Use generic QMP driver for UFS 2019-12-07 20:21 [PATCH 0/2] phy: qcom-qmp: Add MSM8996 UFS QMP support Bjorn Andersson 2019-12-07 20:21 ` [PATCH 1/2] " Bjorn Andersson @ 2019-12-07 20:21 ` Bjorn Andersson 1 sibling, 0 replies; 7+ messages in thread From: Bjorn Andersson @ 2019-12-07 20:21 UTC (permalink / raw) To: Andy Gross, Bjorn Andersson Cc: Kishon Vijay Abraham I, Rob Herring, Mark Rutland, linux-arm-msm, linux-kernel, devicetree, vinod.koul With support for the MSM8996 UFS PHY added to the common QMP driver, migrate the DTS to use the common QMP binding. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> --- arch/arm64/boot/dts/qcom/msm8996.dtsi | 33 +++++++++++++++------------ 1 file changed, 18 insertions(+), 15 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi index c9c6efbbcc01..d0f2544ccf5b 100644 --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi @@ -1323,27 +1323,30 @@ spmi_bus: qcom,spmi@400f000 { #interrupt-cells = <4>; }; - ufsphy: phy@627000 { - compatible = "qcom,msm8996-ufs-phy-qmp-14nm"; - reg = <0x627000 0xda8>; - reg-names = "phy_mem"; - #phy-cells = <0>; + ufs_phy: phy@627000 { + compatible = "qcom,msm8996-qmp-ufs-phy"; + reg = <0x00627000 0x1c4>; + #address-cells = <1>; + #size-cells = <1>; + ranges; vdda-phy-supply = <&pm8994_l28>; vdda-pll-supply = <&pm8994_l12>; - - vdda-phy-max-microamp = <18380>; - vdda-pll-max-microamp = <9440>; - vddp-ref-clk-supply = <&pm8994_l25>; - vddp-ref-clk-max-microamp = <100>; - vddp-ref-clk-always-on; - clock-names = "ref_clk_src", "ref_clk"; - clocks = <&rpmcc RPM_SMD_LN_BB_CLK>, - <&gcc GCC_UFS_CLKREF_CLK>; + clocks = <&gcc GCC_UFS_CLKREF_CLK>; + clock-names = "ref"; + resets = <&ufshc 0>; + reset-names = "ufsphy"; status = "disabled"; + + ufs_phy_lane: lanes@627400 { + reg = <0x627400 0x12c>, + <0x627600 0x200>, + <0x627c00 0x1b4>; + #phy-cells = <0>; + }; }; ufshc: ufshc@624000 { @@ -1351,7 +1354,7 @@ ufshc: ufshc@624000 { reg = <0x624000 0x2500>; interrupts = <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>; - phys = <&ufsphy>; + phys = <&ufs_phy_lane>; phy-names = "ufsphy"; vcc-supply = <&pm8994_l20>; -- 2.24.0 ^ permalink raw reply related [flat|nested] 7+ messages in thread
end of thread, other threads:[~2019-12-19 13:48 UTC | newest] Thread overview: 7+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2019-12-07 20:21 [PATCH 0/2] phy: qcom-qmp: Add MSM8996 UFS QMP support Bjorn Andersson 2019-12-07 20:21 ` [PATCH 1/2] " Bjorn Andersson 2019-12-18 23:42 ` Rob Herring 2019-12-19 4:20 ` Vinod Koul 2019-12-19 7:06 ` Bjorn Andersson 2019-12-19 13:48 ` Vinod Koul 2019-12-07 20:21 ` [PATCH 2/2] arm64: dts: qcom: msm8996: Use generic QMP driver for UFS Bjorn Andersson
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