From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.6 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,USER_AGENT_SANE_2 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B1D8DC2D0C0 for ; Mon, 23 Dec 2019 11:00:16 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 8A84220882 for ; Mon, 23 Dec 2019 11:00:16 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1577098816; bh=1vGFLkbvKus/2D6hTriWlriq8CwJYe5ZiDjw/Yj+Ibs=; h=Date:From:To:Cc:Subject:In-Reply-To:References:List-ID:From; b=lirS9HSk0snjCT0lbVERO2/oP/fpFGCwTIeq/nBhxk7x4tjAkBrz7GynQmRfA1QAr Es+LDWyIUZAWx7kQAV1YrW9SIX/xXAyfg8InzoZuGWZuT8jofPvxU/Y9kh44Wzu8ht SvCfByNNJSDht51Ok9CkO2DsDQq2TSNfMl65bUqk= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726876AbfLWLAP (ORCPT ); Mon, 23 Dec 2019 06:00:15 -0500 Received: from mail.kernel.org ([198.145.29.99]:57974 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726257AbfLWLAP (ORCPT ); Mon, 23 Dec 2019 06:00:15 -0500 Received: from archlinux (cpc149474-cmbg20-2-0-cust94.5-4.cable.virginm.net [82.4.196.95]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 67E3120709; Mon, 23 Dec 2019 11:00:12 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1577098814; bh=1vGFLkbvKus/2D6hTriWlriq8CwJYe5ZiDjw/Yj+Ibs=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=rzzQgUOtZcpmHu9QFAnBpt2h+j+o8mYL/1GgXDHHxCnfAZzFGeI7PnBsWFtqS2vQc Bssaxd7RJNRE03xY5UVa33WlsM2kz0F/Tx5kyyBR2DDa+d+gc0FOBfOntift2LGmDt fPrQUKq5h1baHBo4tVN2weaLd13uBu/DMWvF8JmU= Date: Mon, 23 Dec 2019 11:00:09 +0000 From: Jonathan Cameron To: Beniamin Bia Cc: , , , , , , , , Subject: Re: [PATCH 3/3] dt-binding: iio: Add documentation for ADF4371 channel child notes Message-ID: <20191223110009.6fcc2951@archlinux> In-Reply-To: <20191219133755.26109-3-beniamin.bia@analog.com> References: <20191219133755.26109-1-beniamin.bia@analog.com> <20191219133755.26109-3-beniamin.bia@analog.com> X-Mailer: Claws Mail 3.17.4 (GTK+ 2.24.32; x86_64-pc-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On Thu, 19 Dec 2019 15:37:55 +0200 Beniamin Bia wrote: > This patch documents the ADF4371 individual channel configuration. > > Signed-off-by: Beniamin Bia > --- > .../bindings/iio/frequency/adf4371.yaml | 63 +++++++++++++++++++ > 1 file changed, 63 insertions(+) > > diff --git a/Documentation/devicetree/bindings/iio/frequency/adf4371.yaml b/Documentation/devicetree/bindings/iio/frequency/adf4371.yaml > index 7ec3ec94356b..5339c929e883 100644 > --- a/Documentation/devicetree/bindings/iio/frequency/adf4371.yaml > +++ b/Documentation/devicetree/bindings/iio/frequency/adf4371.yaml > @@ -40,12 +40,48 @@ properties: > output stage will shut down until the ADF4371/ADF4372 achieves lock as > measured by the digital lock detect circuitry. > > + '#address-cells': > + const: 1 > + > + '#size-cells': > + const: 0 > + > required: > - compatible > - reg > - clocks > - clock-names > > + patternProperties: > + "^channel@[01]$": > + type: object > + description: Represents the external channels which are connected to the device. > + > + properties: > + reg: > + description: | > + The channel number. It can have up to 3 channels on adf4372 > + and 4 channels on adf4371, numbered from 0 to 3. > + maxItems: 1 > + > + adi,output-enable: > + description: | > + If this property is specified, the output channel will be enabled. > + If left empty, the driver will initialize the defaults (RF8x, channel 0 > + will be the only one enabled). If I read the driver right, this is effectively 'power up channel when driver loads'. Why do we need that in DT? A bit of udev magic or similar and the existing controls can set both this and the frequency below. Would happen a tiny bit after the driver loads, but I assume the driver current loads with the channels turned off so that shouldn't matter... > + maxItems: 1 > + > + adi,power-up-frequency: > + description: | > + Set the frequency after power up for the channel. If this property is > + specified, it has to be in sync with the power up frequency set on the > + other channels. This limitation is due to the fact that all the channel > + frequencies are derived from the VCO fundamental frequency. > + maxItems: 1 > + > + required: > + - reg > + > examples: > - | > spi0 { > @@ -55,9 +91,36 @@ examples: > frequency@0 { > compatible = "adi,adf4371"; > reg = <0>; > + > + #address-cells = <1>; > + #size-cells = <0>; > + > spi-max-frequency = <1000000>; > clocks = <&adf4371_clkin>; > clock-names = "clkin"; > + > + channel@0 { > + reg = <0>; > + adi,output-enable; > + adi,power-up-frequency = /bits/ 64 <8000000000>; > + }; > + > + channel@1 { > + reg = <1>; > + adi,output-enable; > + }; > + > + channel@2 { > + reg = <2>; > + adi,output-enable; > + adi,power-up-frequency = /bits/ 64 <16000000000>; > + }; > + > + channel@3 { > + reg = <3>; > + adi,output-enable; > + adi,power-up-frequency = /bits/ 64 <32000000000>; > + }; > }; > }; > ...