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[64.64.229.47]) by smtp.gmail.com with ESMTPSA id 100sm20590383pjo.17.2019.12.23.06.53.13 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 23 Dec 2019 06:53:14 -0800 (PST) Date: Mon, 23 Dec 2019 22:53:11 +0800 From: Dejin Zheng To: Dmitry Osipenko Cc: Rob Herring , Greg Kroah-Hartman , Peter Chen , Thierry Reding , Jonathan Hunter , Felipe Balbi , devicetree@vger.kernel.org, linux-usb@vger.kernel.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v2 08/10] usb: phy: tegra: Use u32 for hardware register variables Message-ID: <20191223145311.GA9183@nuc8i5> References: <20191220015238.9228-1-digetx@gmail.com> <20191220015238.9228-9-digetx@gmail.com> <20191222132227.GA7096@nuc8i5> <6c0fbeb2-3db2-f331-fc0a-a900241a32f5@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <6c0fbeb2-3db2-f331-fc0a-a900241a32f5@gmail.com> User-Agent: Mutt/1.9.4 (2018-02-28) Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On Mon, Dec 23, 2019 at 12:48:09AM +0300, Dmitry Osipenko wrote: > 22.12.2019 16:24, Dejin Zheng пишет: > > On Fri, Dec 20, 2019 at 04:52:36AM +0300, Dmitry Osipenko wrote: > >> There is a mix of u32/ULONG usage in the driver's code. Let's switch to > >> u32 uniformly, for consistency. > >> > >> Suggested-by: Thierry Reding > >> Signed-off-by: Dmitry Osipenko > >> --- > >> drivers/usb/phy/phy-tegra-usb.c | 28 +++++++++++++++------------- > >> 1 file changed, 15 insertions(+), 13 deletions(-) > >> > >> diff --git a/drivers/usb/phy/phy-tegra-usb.c b/drivers/usb/phy/phy-tegra-usb.c > >> index d5739b6e0b6c..551c94e3877a 100644 > >> --- a/drivers/usb/phy/phy-tegra-usb.c > >> +++ b/drivers/usb/phy/phy-tegra-usb.c > >> @@ -202,7 +202,7 @@ static inline struct tegra_usb_phy *to_tegra_usb_phy(struct usb_phy *u_phy) > >> static void set_pts(struct tegra_usb_phy *phy, u8 pts_val) > >> { > >> void __iomem *base = phy->regs; > >> - unsigned long val; > >> + u32 val; > >> > >> if (phy->soc_config->has_hostpc) { > >> val = readl_relaxed(base + TEGRA_USB_HOSTPC1_DEVLC); > >> @@ -221,7 +221,7 @@ static void set_pts(struct tegra_usb_phy *phy, u8 pts_val) > >> static void set_phcd(struct tegra_usb_phy *phy, bool enable) > >> { > >> void __iomem *base = phy->regs; > >> - unsigned long val; > >> + u32 val; > >> > >> if (phy->soc_config->has_hostpc) { > >> val = readl_relaxed(base + TEGRA_USB_HOSTPC1_DEVLC); > >> @@ -320,7 +320,8 @@ static int utmip_pad_power_on(struct tegra_usb_phy *phy) > >> { > >> struct tegra_utmip_config *config = phy->config; > >> void __iomem *base = phy->pad_regs; > >> - unsigned long val, flags; > >> + unsigned long flags; > >> + u32 val; > > Why are you still using unsigned long here? > > Please take a look at [1][2], the types are matching callees. > > [1] > https://elixir.bootlin.com/linux/v5.5-rc2/source/include/linux/spinlock.h#L249 > > [2] > https://elixir.bootlin.com/linux/v5.5-rc2/source/include/asm-generic/io.h#L297 Okay, thanks for your explanation. Dejin