Convert the ChromeOS EC bindings to json-schema. Signed-off-by: Ikjoon Jang <ikjn@chromium.org> --- .../devicetree/bindings/mfd/cros-ec.txt | 76 ---------- .../devicetree/bindings/mfd/cros-ec.yaml | 138 ++++++++++++++++++ 2 files changed, 138 insertions(+), 76 deletions(-) delete mode 100644 Documentation/devicetree/bindings/mfd/cros-ec.txt create mode 100644 Documentation/devicetree/bindings/mfd/cros-ec.yaml diff --git a/Documentation/devicetree/bindings/mfd/cros-ec.txt b/Documentation/devicetree/bindings/mfd/cros-ec.txt deleted file mode 100644 index 4860eabd0f72..000000000000 --- a/Documentation/devicetree/bindings/mfd/cros-ec.txt +++ /dev/null @@ -1,76 +0,0 @@ -ChromeOS Embedded Controller - -Google's ChromeOS EC is a Cortex-M device which talks to the AP and -implements various function such as keyboard and battery charging. - -The EC can be connect through various means (I2C, SPI, LPC, RPMSG) and the -compatible string used depends on the interface. Each connection method has -its own driver which connects to the top level interface-agnostic EC driver. -Other Linux driver (such as cros-ec-keyb for the matrix keyboard) connect to -the top-level driver. - -Required properties (I2C): -- compatible: "google,cros-ec-i2c" -- reg: I2C slave address - -Required properties (SPI): -- compatible: "google,cros-ec-spi" -- reg: SPI chip select - -Required properties (RPMSG): -- compatible: "google,cros-ec-rpmsg" - -Optional properties (SPI): -- google,cros-ec-spi-pre-delay: Some implementations of the EC need a little - time to wake up from sleep before they can receive SPI transfers at a high - clock rate. This property specifies the delay, in usecs, between the - assertion of the CS to the start of the first clock pulse. -- google,cros-ec-spi-msg-delay: Some implementations of the EC require some - additional processing time in order to accept new transactions. If the delay - between transactions is not long enough the EC may not be able to respond - properly to subsequent transactions and cause them to hang. This property - specifies the delay, in usecs, introduced between transactions to account - for the time required by the EC to get back into a state in which new data - can be accepted. - -Required properties (LPC): -- compatible: "google,cros-ec-lpc" -- reg: List of (IO address, size) pairs defining the interface uses - -Optional properties (all): -- google,has-vbc-nvram: Some implementations of the EC include a small - nvram space used to store verified boot context data. This boolean flag - is used to specify whether this nvram is present or not. - -Example for I2C: - -i2c@12ca0000 { - cros-ec@1e { - reg = <0x1e>; - compatible = "google,cros-ec-i2c"; - interrupts = <14 0>; - interrupt-parent = <&wakeup_eint>; - wakeup-source; - }; - - -Example for SPI: - -spi@131b0000 { - ec@0 { - compatible = "google,cros-ec-spi"; - reg = <0x0>; - interrupts = <14 0>; - interrupt-parent = <&wakeup_eint>; - wakeup-source; - spi-max-frequency = <5000000>; - controller-data { - cs-gpio = <&gpf0 3 4 3 0>; - samsung,spi-cs; - samsung,spi-feedback-delay = <2>; - }; - }; -}; - - -Example for LPC is not supplied as it is not yet implemented. diff --git a/Documentation/devicetree/bindings/mfd/cros-ec.yaml b/Documentation/devicetree/bindings/mfd/cros-ec.yaml new file mode 100644 index 000000000000..ea430f0a553b --- /dev/null +++ b/Documentation/devicetree/bindings/mfd/cros-ec.yaml @@ -0,0 +1,138 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mfd/cros-ec.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: ChromeOS Embedded Controller + +maintainers: + - Benson Leung <bleung@chromium.org> + - Enric Balletbo i Serra <enric.balletbo@collabora.com> + - Guenter Roeck <groeck@chromium.org> + +description: | + Google's ChromeOS EC is a Cortex-M device which talks to the AP and + implements various function such as keyboard and battery charging. + The EC can be connect through various means (I2C, SPI, LPC, RPMSG) + and the compatible string used depends on the interface. + Each connection method has its own driver which connects to the + top level interface-agnostic EC driver. Other Linux driver + (such as cros-ec-keyb for the matrix keyboard) connect to the + top-level driver. + +properties: + compatible: + oneOf: + - description: + For implementations of the EC is connected through I2C. + const: google,cros-ec-i2c + - description: + For implementations of the EC is connected through SPI. + const: google,cros-ec-spi + - description: + For implementations of the EC is connected through LPC. + const: google,cros-ec-lpc + - description: + For implementations of the EC is connected through RPMSG. + const: google,cros-ec-rpmsg + + google,has-vbc-nvram: + description: | + Some implementations of the EC include a small + nvram space used to store verified boot context data. + This boolean flag is used to specify whether this nvram is present or not. + type: boolean + +required: + - compatible + +allOf: + - if: + properties: + compatible: + const: google,cros-ec-i2c + then: + properties: + reg: + description: I2C slave address + maxItems: 1 + required: + - reg + - if: + properties: + compatible: + const: google,cros-ec-spi + then: + properties: + reg: + description: SPI chip select + maxItems: 1 + google,cros-ec-spi-pre-delay: + description: | + Some implementations of the EC need a little time to wake up + from sleep before they can receive SPI transfers + at a high clock rate. This property specifies the delay, + in usecs, between the assertion of the CS to the start of + the first clock pulse. + google,cros-ec-spi-msg-delay: + description: | + Some implementations of the EC require some additional + processing time in order to accept new transactions. + If the delay between transactions is not long enough + the EC may not be able to respond properly to + subsequent transactions and cause them to hang. + This property specifies the delay, in usecs, + introduced between transactions to account for the + time required by the EC to get back into a state + in which new data can be accepted. + required: + - reg + + - if: + properties: + compatible: + const: google,cros-ec-lpc + then: + properties: + reg: + description: | + List of (IO address, size) pairs defining the interface uses + required: + - reg + +examples: + - |+ + // Example for I2C + i2c@12ca0000 { + #address-cells = <1>; + #size-cells = <0>; + cros-ec@1e { + reg = <0x1e>; + compatible = "google,cros-ec-i2c"; + interrupts = <14 0>; + interrupt-parent = <&wakeup_eint>; + wakeup-source; + }; + }; + - |+ + // Example for SPI + spi@131b0000 { + #address-cells = <1>; + #size-cells = <0>; + ec@0 { + compatible = "google,cros-ec-spi"; + reg = <0x0>; + interrupts = <14 0>; + interrupt-parent = <&wakeup_eint>; + wakeup-source; + spi-max-frequency = <5000000>; + controller-data { + cs-gpio = <&gpf0 3 4 3 0>; + samsung,spi-cs; + samsung,spi-feedback-delay = <2>; + }; + }; + }; + +... -- 2.25.0.rc1.283.g88dfdc4193-goog
Hi Ikjoon, cc'ing Gwendal who might be interested on participate on the discussion. Many thanks for sending this upstream, some comments below ... I'd like to take this opportunity to improve this part and a bit or rewording. On 14/1/20 3:19, Ikjoon Jang wrote: > Convert the ChromeOS EC bindings to json-schema. > > Signed-off-by: Ikjoon Jang <ikjn@chromium.org> > --- > .../devicetree/bindings/mfd/cros-ec.txt | 76 ---------- > .../devicetree/bindings/mfd/cros-ec.yaml | 138 ++++++++++++++++++ This is not an mfd binding anymore, the old binding is in the wrong place, please move to devicetree/bindings/chrome/google,cros-ec.yaml > 2 files changed, 138 insertions(+), 76 deletions(-) > delete mode 100644 Documentation/devicetree/bindings/mfd/cros-ec.txt > create mode 100644 Documentation/devicetree/bindings/mfd/cros-ec.yaml > > diff --git a/Documentation/devicetree/bindings/mfd/cros-ec.txt b/Documentation/devicetree/bindings/mfd/cros-ec.txt > deleted file mode 100644 > index 4860eabd0f72..000000000000 > --- a/Documentation/devicetree/bindings/mfd/cros-ec.txt > +++ /dev/null > @@ -1,76 +0,0 @@ > -ChromeOS Embedded Controller > - > -Google's ChromeOS EC is a Cortex-M device which talks to the AP and > -implements various function such as keyboard and battery charging. > - > -The EC can be connect through various means (I2C, SPI, LPC, RPMSG) and the > -compatible string used depends on the interface. Each connection method has > -its own driver which connects to the top level interface-agnostic EC driver. > -Other Linux driver (such as cros-ec-keyb for the matrix keyboard) connect to > -the top-level driver. > - > -Required properties (I2C): > -- compatible: "google,cros-ec-i2c" > -- reg: I2C slave address > - > -Required properties (SPI): > -- compatible: "google,cros-ec-spi" > -- reg: SPI chip select > - > -Required properties (RPMSG): > -- compatible: "google,cros-ec-rpmsg" > - > -Optional properties (SPI): > -- google,cros-ec-spi-pre-delay: Some implementations of the EC need a little > - time to wake up from sleep before they can receive SPI transfers at a high > - clock rate. This property specifies the delay, in usecs, between the > - assertion of the CS to the start of the first clock pulse. > -- google,cros-ec-spi-msg-delay: Some implementations of the EC require some > - additional processing time in order to accept new transactions. If the delay > - between transactions is not long enough the EC may not be able to respond > - properly to subsequent transactions and cause them to hang. This property > - specifies the delay, in usecs, introduced between transactions to account > - for the time required by the EC to get back into a state in which new data > - can be accepted. > - > -Required properties (LPC): > -- compatible: "google,cros-ec-lpc" > -- reg: List of (IO address, size) pairs defining the interface uses > - > -Optional properties (all): > -- google,has-vbc-nvram: Some implementations of the EC include a small > - nvram space used to store verified boot context data. This boolean flag > - is used to specify whether this nvram is present or not. > - > -Example for I2C: > - > -i2c@12ca0000 { > - cros-ec@1e { > - reg = <0x1e>; > - compatible = "google,cros-ec-i2c"; > - interrupts = <14 0>; > - interrupt-parent = <&wakeup_eint>; > - wakeup-source; > - }; > - > - > -Example for SPI: > - > -spi@131b0000 { > - ec@0 { > - compatible = "google,cros-ec-spi"; > - reg = <0x0>; > - interrupts = <14 0>; > - interrupt-parent = <&wakeup_eint>; > - wakeup-source; > - spi-max-frequency = <5000000>; > - controller-data { > - cs-gpio = <&gpf0 3 4 3 0>; > - samsung,spi-cs; > - samsung,spi-feedback-delay = <2>; > - }; > - }; > -}; > - > - > -Example for LPC is not supplied as it is not yet implemented. > diff --git a/Documentation/devicetree/bindings/mfd/cros-ec.yaml b/Documentation/devicetree/bindings/mfd/cros-ec.yaml > new file mode 100644 > index 000000000000..ea430f0a553b > --- /dev/null > +++ b/Documentation/devicetree/bindings/mfd/cros-ec.yaml > @@ -0,0 +1,138 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/mfd/cros-ec.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: ChromeOS Embedded Controller > + > +maintainers: > + - Benson Leung <bleung@chromium.org> > + - Enric Balletbo i Serra <enric.balletbo@collabora.com> > + - Guenter Roeck <groeck@chromium.org> > + > +description: | > + Google's ChromeOS EC is a Cortex-M device which talks to the AP and > + implements various function such as keyboard and battery charging. I am not English native but I guess there are some typos. Lets take this opportunity to rewrite fix some parts, please feel free to ignore them if I am wrong. typo: functions? > + The EC can be connect through various means (I2C, SPI, LPC, RPMSG) typo: 'connected' or 'is connected' I'd add '(I2C, SPI and others)' where other is RPMSG, ISHP, and future transport layers. > + and the compatible string used depends on the interface. on the communication interface? > + Each connection method has its own driver which connects to the > + top level interface-agnostic EC driver. Other Linux driver > + (such as cros-ec-keyb for the matrix keyboard) connect to the > + top-level driver. Not sure this part is clear an accurate to the reality, I'd just remove it. > + > +properties: > + compatible: > + oneOf: > + - description: > + For implementations of the EC is connected through I2C. s/is/are connected/? And the same change applies below. > + const: google,cros-ec-i2c > + - description: > + For implementations of the EC is connected through SPI. > + const: google,cros-ec-spi > + - description: > + For implementations of the EC is connected through LPC. > + const: google,cros-ec-lpc This does not exist in mainline so remove it. > + - description: > + For implementations of the EC is connected through RPMSG. > + const: google,cros-ec-rpmsg > + > + google,has-vbc-nvram: > + description: | > + Some implementations of the EC include a small > + nvram space used to store verified boot context data. > + This boolean flag is used to specify whether this nvram is present or not. > + type: boolean > + > +required: > + - compatible > + > +allOf: > + - if: > + properties: > + compatible: > + const: google,cros-ec-i2c > + then: > + properties: > + reg: > + description: I2C slave address > + maxItems: 1 > + required: > + - reg > + - if: > + properties: > + compatible: > + const: google,cros-ec-spi > + then: > + properties: > + reg: > + description: SPI chip select > + maxItems: 1 > + google,cros-ec-spi-pre-delay: > + description: | > + Some implementations of the EC need a little time to wake up > + from sleep before they can receive SPI transfers > + at a high clock rate. This property specifies the delay, > + in usecs, between the assertion of the CS to the start of > + the first clock pulse. > + google,cros-ec-spi-msg-delay: > + description: | > + Some implementations of the EC require some additional > + processing time in order to accept new transactions. > + If the delay between transactions is not long enough > + the EC may not be able to respond properly to > + subsequent transactions and cause them to hang. > + This property specifies the delay, in usecs, > + introduced between transactions to account for the > + time required by the EC to get back into a state > + in which new data can be accepted. > + required: > + - reg > + > + - if: > + properties: > + compatible: > + const: google,cros-ec-lpc > + then: > + properties: > + reg: > + description: | > + List of (IO address, size) pairs defining the interface uses > + required: > + - reg > + Remove the LPC part. > +examples: > + - |+ > + // Example for I2C Use c style comments I guess > + i2c@12ca0000 { i2c0 { > + #address-cells = <1>; > + #size-cells = <0>; nit: Add an empty line here > + cros-ec@1e { > + reg = <0x1e>; > + compatible = "google,cros-ec-i2c"; The compatible on top > + interrupts = <14 0>; > + interrupt-parent = <&wakeup_eint>; > + wakeup-source; > + }; Just let's use an upstream example, i.e the snow one: cros-ec@1e { compatible = "google,cros-ec-i2c"; reg = <0x1e>; interrupts = <6 IRQ_TYPE_NONE>; interrupt-parent = <&gpx1>; }; > + }; > + - |+ > + // Example for SPI > + spi@131b0000 { spi0 { > + #address-cells = <1>; > + #size-cells = <0>; nit: Add an empty line here > + ec@0 { Use cros-ec@0, same name as before to be coherent > + compatible = "google,cros-ec-spi"; > + reg = <0x0>; > + interrupts = <14 0>; > + interrupt-parent = <&wakeup_eint>; What about selecting a more simple example, without the controller-data to not confuse the reader. > + wakeup-source; > + spi-max-frequency = <5000000>; > + controller-data { > + cs-gpio = <&gpf0 3 4 3 0>; > + samsung,spi-cs; > + samsung,spi-feedback-delay = <2>; > + }; > + }; > + }; > + I propose the veyron one. cros-ec@0 { compatible = "google,cros-ec-spi"; reg = <0>; google,cros-ec-spi-pre-delay = <30>; interrupt-parent = <&gpio7>; interrupts = <RK_PA7 IRQ_TYPE_LEVEL_LOW>; spi-max-frequency = <3000000>; }; > +... > Could we have a RPMSG example too? Thanks, Enric
Hi, <snip> > > Signed-off-by: Ikjoon Jang <ikjn@chromium.org> > > --- > > .../devicetree/bindings/mfd/cros-ec.txt | 76 ---------- > > .../devicetree/bindings/mfd/cros-ec.yaml | 138 ++++++++++++++++++ > > This is not an mfd binding anymore, the old binding is in the wrong place, > please move to devicetree/bindings/chrome/google,cros-ec.yaml > I think creating a new 'chrome' subdirectory should involve more discussions as there are other chrome related things in dt-binding. I'd like to convert the format first before moving forward. <snip> > > +description: | > > + Google's ChromeOS EC is a Cortex-M device which talks to the AP and > > + implements various function such as keyboard and battery charging. > > I am not English native but I guess there are some typos. Lets take this > opportunity to rewrite fix some parts, please feel free to ignore them if I am > wrong. > yeah, I'm not too. Honestly, there was nothing strange for me before you point out. :-) anyway I'm trying my best to fix those things mentioned (typos, removing LPC, rpmsg examples) and do some generalizations (e.g. Cortex --> microcontroller). send v2 patch soon. Thanks! > typo: functions? > > > + The EC can be connect through various means (I2C, SPI, LPC, RPMSG) > > typo: 'connected' or 'is connected' > > > I'd add '(I2C, SPI and others)' where other is RPMSG, ISHP, and future transport > layers. > > > + and the compatible string used depends on the interface. > > on the communication interface? > > > + Each connection method has its own driver which connects to the > > + top level interface-agnostic EC driver. Other Linux driver > > + (such as cros-ec-keyb for the matrix keyboard) connect to the > > + top-level driver. > > Not sure this part is clear an accurate to the reality, I'd just remove it. ACK > > > + > > +properties: > > + compatible: > > + oneOf: > > + - description: > > + For implementations of the EC is connected through I2C. > > s/is/are connected/? > > And the same change applies below. > > > + const: google,cros-ec-i2c > > + - description: > > + For implementations of the EC is connected through SPI. > > + const: google,cros-ec-spi > > > + - description: > > + For implementations of the EC is connected through LPC. > > + const: google,cros-ec-lpc > > This does not exist in mainline so remove it. ACK <snip> > + google,cros-ec-spi-pre-delay: > + description: | > + Some implementations of the EC need a little time to wake up > + from sleep before they can receive SPI transfers > + at a high clock rate. This property specifies the delay, > + in usecs, between the assertion of the CS to the start of > + the first clock pulse. > + google,cros-ec-spi-msg-delay: > + description: | > + Some implementations of the EC require some additional > + processing time in order to accept new transactions. > + If the delay between transactions is not long enough > + the EC may not be able to respond properly to > + subsequent transactions and cause them to hang. > + This property specifies the delay, in usecs, > + introduced between transactions to account for the > + time required by the EC to get back into a state > + in which new data can be accepted. I will remove some details here ('some implementations need something' parts). <snip> > > + - if: > > + properties: > > + compatible: > > + const: google,cros-ec-lpc > > + then: > > + properties: > > + reg: > > + description: | > > + List of (IO address, size) pairs defining the interface uses > > + required: > > + - reg > > + > > Remove the LPC part. ACK > > > +examples: > > + - |+ > > + // Example for I2C > > Use c style comments I guess Okay, I will use '#' outside of example context in v2. > > > + i2c@12ca0000 { > > i2c0 { > > > + #address-cells = <1>; > > + #size-cells = <0>; > > nit: Add an empty line here ACK > > > + cros-ec@1e { > > + reg = <0x1e>; > > + compatible = "google,cros-ec-i2c"; > > The compatible on top > > > + interrupts = <14 0>; > > + interrupt-parent = <&wakeup_eint>; > > + wakeup-source; > > + }; > > Just let's use an upstream example, i.e the snow one: > > cros-ec@1e { > compatible = "google,cros-ec-i2c"; > reg = <0x1e>; > interrupts = <6 IRQ_TYPE_NONE>; > interrupt-parent = <&gpx1>; > }; > > > + }; > > + - |+ > > + // Example for SPI > > + spi@131b0000 { > > spi0 { > > > + #address-cells = <1>; > > + #size-cells = <0>; > > nit: Add an empty line here ACK > > > + ec@0 { > > Use cros-ec@0, same name as before to be coherent > > > + compatible = "google,cros-ec-spi"; > > + reg = <0x0>; > > + interrupts = <14 0>; > > + interrupt-parent = <&wakeup_eint>; > > What about selecting a more simple example, without the controller-data to not > confuse the reader. > > > + wakeup-source; > > + spi-max-frequency = <5000000>; > > + controller-data { > > + cs-gpio = <&gpf0 3 4 3 0>; > > + samsung,spi-cs; > > + samsung,spi-feedback-delay = <2>; > > + }; > > + }; > > + }; > > + > > I propose the veyron one. > > cros-ec@0 { > > compatible = "google,cros-ec-spi"; > reg = <0>; > google,cros-ec-spi-pre-delay = <30>; > interrupt-parent = <&gpio7>; > interrupts = <RK_PA7 IRQ_TYPE_LEVEL_LOW>; > spi-max-frequency = <3000000>; > }; > > > +... > > > Okay, but I will use interrupts = <99 0> instead of <RK_XXX IRQ_XXX> in here. :-) > Could we have a RPMSG example too? Okay > > Thanks, > Enric
Convert the ChromeOS EC bindings to json-schema. Signed-off-by: Ikjoon Jang <ikjn@chromium.org> --- .../devicetree/bindings/mfd/cros-ec.txt | 76 ------------ .../devicetree/bindings/mfd/cros-ec.yaml | 111 ++++++++++++++++++ 2 files changed, 111 insertions(+), 76 deletions(-) delete mode 100644 Documentation/devicetree/bindings/mfd/cros-ec.txt create mode 100644 Documentation/devicetree/bindings/mfd/cros-ec.yaml diff --git a/Documentation/devicetree/bindings/mfd/cros-ec.txt b/Documentation/devicetree/bindings/mfd/cros-ec.txt deleted file mode 100644 index 4860eabd0f72..000000000000 --- a/Documentation/devicetree/bindings/mfd/cros-ec.txt +++ /dev/null @@ -1,76 +0,0 @@ -ChromeOS Embedded Controller - -Google's ChromeOS EC is a Cortex-M device which talks to the AP and -implements various function such as keyboard and battery charging. - -The EC can be connect through various means (I2C, SPI, LPC, RPMSG) and the -compatible string used depends on the interface. Each connection method has -its own driver which connects to the top level interface-agnostic EC driver. -Other Linux driver (such as cros-ec-keyb for the matrix keyboard) connect to -the top-level driver. - -Required properties (I2C): -- compatible: "google,cros-ec-i2c" -- reg: I2C slave address - -Required properties (SPI): -- compatible: "google,cros-ec-spi" -- reg: SPI chip select - -Required properties (RPMSG): -- compatible: "google,cros-ec-rpmsg" - -Optional properties (SPI): -- google,cros-ec-spi-pre-delay: Some implementations of the EC need a little - time to wake up from sleep before they can receive SPI transfers at a high - clock rate. This property specifies the delay, in usecs, between the - assertion of the CS to the start of the first clock pulse. -- google,cros-ec-spi-msg-delay: Some implementations of the EC require some - additional processing time in order to accept new transactions. If the delay - between transactions is not long enough the EC may not be able to respond - properly to subsequent transactions and cause them to hang. This property - specifies the delay, in usecs, introduced between transactions to account - for the time required by the EC to get back into a state in which new data - can be accepted. - -Required properties (LPC): -- compatible: "google,cros-ec-lpc" -- reg: List of (IO address, size) pairs defining the interface uses - -Optional properties (all): -- google,has-vbc-nvram: Some implementations of the EC include a small - nvram space used to store verified boot context data. This boolean flag - is used to specify whether this nvram is present or not. - -Example for I2C: - -i2c@12ca0000 { - cros-ec@1e { - reg = <0x1e>; - compatible = "google,cros-ec-i2c"; - interrupts = <14 0>; - interrupt-parent = <&wakeup_eint>; - wakeup-source; - }; - - -Example for SPI: - -spi@131b0000 { - ec@0 { - compatible = "google,cros-ec-spi"; - reg = <0x0>; - interrupts = <14 0>; - interrupt-parent = <&wakeup_eint>; - wakeup-source; - spi-max-frequency = <5000000>; - controller-data { - cs-gpio = <&gpf0 3 4 3 0>; - samsung,spi-cs; - samsung,spi-feedback-delay = <2>; - }; - }; -}; - - -Example for LPC is not supplied as it is not yet implemented. diff --git a/Documentation/devicetree/bindings/mfd/cros-ec.yaml b/Documentation/devicetree/bindings/mfd/cros-ec.yaml new file mode 100644 index 000000000000..633fa32c5746 --- /dev/null +++ b/Documentation/devicetree/bindings/mfd/cros-ec.yaml @@ -0,0 +1,111 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mfd/cros-ec.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: ChromeOS Embedded Controller + +maintainers: + - Benson Leung <bleung@chromium.org> + - Enric Balletbo i Serra <enric.balletbo@collabora.com> + - Guenter Roeck <groeck@chromium.org> + +description: | + Google's ChromeOS EC is a microcontroller which talks to the AP and + implements various functions such as keyboard and battery charging. + The EC can be connected through various interfaces (I2C, SPI, and others) + and the compatible string specifies which interface is being used. + +properties: + compatible: + oneOf: + - description: + For implementations of the EC is connected through I2C. + const: google,cros-ec-i2c + - description: + For implementations of the EC is connected through SPI. + const: google,cros-ec-spi + - description: + For implementations of the EC is connected through RPMSG. + const: google,cros-ec-rpmsg + + google,has-vbc-nvram: + description: | + Some implementations of the EC include a small + nvram space used to store verified boot context data. + This boolean flag is used to specify whether this nvram is + present or not. + type: boolean + +required: + - compatible + +allOf: + - if: + properties: + compatible: + const: google,cros-ec-i2c + then: + properties: + reg: + description: I2C slave address + maxItems: 1 + required: + - reg + - if: + properties: + compatible: + const: google,cros-ec-spi + then: + properties: + reg: + description: SPI chip select + maxItems: 1 + google,cros-ec-spi-pre-delay: + description: | + This property specifies the delay in usecs between the + assertion of the CS and the first clock pulse. + google,cros-ec-spi-msg-delay: + description: | + This property specifies the delay in usecs between messages. + required: + - reg + +examples: + # Example for I2C + - | + i2c0 { + #address-cells = <1>; + #size-cells = <0>; + + cros-ec@1e { + compatible = "google,cros-ec-i2c"; + reg = <0x1e>; + interrupts = <6 0>; + interrupt-parent = <&gpx1>; + }; + }; + # Example for SPI + - | + spi0 { + #address-cells = <1>; + #size-cells = <0>; + + cros-ec@0 { + compatible = "google,cros-ec-spi"; + reg = <0x0>; + google,cros-ec-spi-msg-delay = <30>; + interrupts = <99 0>; + interrupt-parent = <&gpio7>; + spi-max-frequency = <5000000>; + }; + }; + # Example for RPMSG + - | + scp0 { + cros_ec@0 { + compatible = "google,cros-ec-rpmsg"; + }; + }; +... -- 2.25.0.rc1.283.g88dfdc4193-goog
Hi Ikjoon, Thanks for the patch. This is really v2 so should have a [PATCH v2] in the subject, also try to maintain a changelog after the --- so is more easy for the reviewer to follow the changes you did. On 16/1/20 11:13, Ikjoon Jang wrote: > Convert the ChromeOS EC bindings to json-schema. > > Signed-off-by: Ikjoon Jang <ikjn@chromium.org> > --- > .../devicetree/bindings/mfd/cros-ec.txt | 76 ------------ > .../devicetree/bindings/mfd/cros-ec.yaml | 111 ++++++++++++++++++ The cros-ec is now a platform/chrome driver and I expect this go through the platform-chrome tree. Like others platform specific drivers (bindings/goldfish ,bindings/x86, etc) I think it is fine to create a chrome directory. So, should be fine to put the binding there. In any case mfd is not right place. Apart from this the patch looks good to me, but I'd like to have a Rob review if possible. So I'll wait a bit more before pick. Thanks. Enric > 2 files changed, 111 insertions(+), 76 deletions(-) > delete mode 100644 Documentation/devicetree/bindings/mfd/cros-ec.txt > create mode 100644 Documentation/devicetree/bindings/mfd/cros-ec.yaml > > diff --git a/Documentation/devicetree/bindings/mfd/cros-ec.txt b/Documentation/devicetree/bindings/mfd/cros-ec.txt > deleted file mode 100644 > index 4860eabd0f72..000000000000 > --- a/Documentation/devicetree/bindings/mfd/cros-ec.txt > +++ /dev/null > @@ -1,76 +0,0 @@ > -ChromeOS Embedded Controller > - > -Google's ChromeOS EC is a Cortex-M device which talks to the AP and > -implements various function such as keyboard and battery charging. > - > -The EC can be connect through various means (I2C, SPI, LPC, RPMSG) and the > -compatible string used depends on the interface. Each connection method has > -its own driver which connects to the top level interface-agnostic EC driver. > -Other Linux driver (such as cros-ec-keyb for the matrix keyboard) connect to > -the top-level driver. > - > -Required properties (I2C): > -- compatible: "google,cros-ec-i2c" > -- reg: I2C slave address > - > -Required properties (SPI): > -- compatible: "google,cros-ec-spi" > -- reg: SPI chip select > - > -Required properties (RPMSG): > -- compatible: "google,cros-ec-rpmsg" > - > -Optional properties (SPI): > -- google,cros-ec-spi-pre-delay: Some implementations of the EC need a little > - time to wake up from sleep before they can receive SPI transfers at a high > - clock rate. This property specifies the delay, in usecs, between the > - assertion of the CS to the start of the first clock pulse. > -- google,cros-ec-spi-msg-delay: Some implementations of the EC require some > - additional processing time in order to accept new transactions. If the delay > - between transactions is not long enough the EC may not be able to respond > - properly to subsequent transactions and cause them to hang. This property > - specifies the delay, in usecs, introduced between transactions to account > - for the time required by the EC to get back into a state in which new data > - can be accepted. > - > -Required properties (LPC): > -- compatible: "google,cros-ec-lpc" > -- reg: List of (IO address, size) pairs defining the interface uses > - > -Optional properties (all): > -- google,has-vbc-nvram: Some implementations of the EC include a small > - nvram space used to store verified boot context data. This boolean flag > - is used to specify whether this nvram is present or not. > - > -Example for I2C: > - > -i2c@12ca0000 { > - cros-ec@1e { > - reg = <0x1e>; > - compatible = "google,cros-ec-i2c"; > - interrupts = <14 0>; > - interrupt-parent = <&wakeup_eint>; > - wakeup-source; > - }; > - > - > -Example for SPI: > - > -spi@131b0000 { > - ec@0 { > - compatible = "google,cros-ec-spi"; > - reg = <0x0>; > - interrupts = <14 0>; > - interrupt-parent = <&wakeup_eint>; > - wakeup-source; > - spi-max-frequency = <5000000>; > - controller-data { > - cs-gpio = <&gpf0 3 4 3 0>; > - samsung,spi-cs; > - samsung,spi-feedback-delay = <2>; > - }; > - }; > -}; > - > - > -Example for LPC is not supplied as it is not yet implemented. > diff --git a/Documentation/devicetree/bindings/mfd/cros-ec.yaml b/Documentation/devicetree/bindings/mfd/cros-ec.yaml > new file mode 100644 > index 000000000000..633fa32c5746 > --- /dev/null > +++ b/Documentation/devicetree/bindings/mfd/cros-ec.yaml > @@ -0,0 +1,111 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/mfd/cros-ec.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: ChromeOS Embedded Controller > + > +maintainers: > + - Benson Leung <bleung@chromium.org> > + - Enric Balletbo i Serra <enric.balletbo@collabora.com> > + - Guenter Roeck <groeck@chromium.org> > + > +description: | > + Google's ChromeOS EC is a microcontroller which talks to the AP and > + implements various functions such as keyboard and battery charging. > + The EC can be connected through various interfaces (I2C, SPI, and others) > + and the compatible string specifies which interface is being used. > + > +properties: > + compatible: > + oneOf: > + - description: > + For implementations of the EC is connected through I2C. > + const: google,cros-ec-i2c > + - description: > + For implementations of the EC is connected through SPI. > + const: google,cros-ec-spi > + - description: > + For implementations of the EC is connected through RPMSG. > + const: google,cros-ec-rpmsg > + > + google,has-vbc-nvram: > + description: | > + Some implementations of the EC include a small > + nvram space used to store verified boot context data. > + This boolean flag is used to specify whether this nvram is > + present or not. > + type: boolean > + > +required: > + - compatible > + > +allOf: > + - if: > + properties: > + compatible: > + const: google,cros-ec-i2c > + then: > + properties: > + reg: > + description: I2C slave address > + maxItems: 1 > + required: > + - reg > + - if: > + properties: > + compatible: > + const: google,cros-ec-spi > + then: > + properties: > + reg: > + description: SPI chip select > + maxItems: 1 > + google,cros-ec-spi-pre-delay: > + description: | > + This property specifies the delay in usecs between the > + assertion of the CS and the first clock pulse. > + google,cros-ec-spi-msg-delay: > + description: | > + This property specifies the delay in usecs between messages. > + required: > + - reg > + > +examples: > + # Example for I2C > + - | > + i2c0 { > + #address-cells = <1>; > + #size-cells = <0>; > + > + cros-ec@1e { > + compatible = "google,cros-ec-i2c"; > + reg = <0x1e>; > + interrupts = <6 0>; > + interrupt-parent = <&gpx1>; > + }; > + }; > + # Example for SPI > + - | > + spi0 { > + #address-cells = <1>; > + #size-cells = <0>; > + > + cros-ec@0 { > + compatible = "google,cros-ec-spi"; > + reg = <0x0>; > + google,cros-ec-spi-msg-delay = <30>; > + interrupts = <99 0>; > + interrupt-parent = <&gpio7>; > + spi-max-frequency = <5000000>; > + }; > + }; > + # Example for RPMSG > + - | > + scp0 { > + cros_ec@0 { nit: s/cros_ec/cros-ec (like the others) > + compatible = "google,cros-ec-rpmsg"; > + }; > + }; > +... >
Convert the ChromeOS EC bindings to json-schema. Signed-off-by: Ikjoon Jang <ikjn@chromium.org> --- v3: node name changed in rpmsg example v2: cleanup description, fix typos, remove LPC, add add RPMSG example --- .../devicetree/bindings/mfd/cros-ec.txt | 76 ------------ .../devicetree/bindings/mfd/cros-ec.yaml | 111 ++++++++++++++++++ 2 files changed, 111 insertions(+), 76 deletions(-) delete mode 100644 Documentation/devicetree/bindings/mfd/cros-ec.txt create mode 100644 Documentation/devicetree/bindings/mfd/cros-ec.yaml diff --git a/Documentation/devicetree/bindings/mfd/cros-ec.txt b/Documentation/devicetree/bindings/mfd/cros-ec.txt deleted file mode 100644 index 4860eabd0f72..000000000000 --- a/Documentation/devicetree/bindings/mfd/cros-ec.txt +++ /dev/null @@ -1,76 +0,0 @@ -ChromeOS Embedded Controller - -Google's ChromeOS EC is a Cortex-M device which talks to the AP and -implements various function such as keyboard and battery charging. - -The EC can be connect through various means (I2C, SPI, LPC, RPMSG) and the -compatible string used depends on the interface. Each connection method has -its own driver which connects to the top level interface-agnostic EC driver. -Other Linux driver (such as cros-ec-keyb for the matrix keyboard) connect to -the top-level driver. - -Required properties (I2C): -- compatible: "google,cros-ec-i2c" -- reg: I2C slave address - -Required properties (SPI): -- compatible: "google,cros-ec-spi" -- reg: SPI chip select - -Required properties (RPMSG): -- compatible: "google,cros-ec-rpmsg" - -Optional properties (SPI): -- google,cros-ec-spi-pre-delay: Some implementations of the EC need a little - time to wake up from sleep before they can receive SPI transfers at a high - clock rate. This property specifies the delay, in usecs, between the - assertion of the CS to the start of the first clock pulse. -- google,cros-ec-spi-msg-delay: Some implementations of the EC require some - additional processing time in order to accept new transactions. If the delay - between transactions is not long enough the EC may not be able to respond - properly to subsequent transactions and cause them to hang. This property - specifies the delay, in usecs, introduced between transactions to account - for the time required by the EC to get back into a state in which new data - can be accepted. - -Required properties (LPC): -- compatible: "google,cros-ec-lpc" -- reg: List of (IO address, size) pairs defining the interface uses - -Optional properties (all): -- google,has-vbc-nvram: Some implementations of the EC include a small - nvram space used to store verified boot context data. This boolean flag - is used to specify whether this nvram is present or not. - -Example for I2C: - -i2c@12ca0000 { - cros-ec@1e { - reg = <0x1e>; - compatible = "google,cros-ec-i2c"; - interrupts = <14 0>; - interrupt-parent = <&wakeup_eint>; - wakeup-source; - }; - - -Example for SPI: - -spi@131b0000 { - ec@0 { - compatible = "google,cros-ec-spi"; - reg = <0x0>; - interrupts = <14 0>; - interrupt-parent = <&wakeup_eint>; - wakeup-source; - spi-max-frequency = <5000000>; - controller-data { - cs-gpio = <&gpf0 3 4 3 0>; - samsung,spi-cs; - samsung,spi-feedback-delay = <2>; - }; - }; -}; - - -Example for LPC is not supplied as it is not yet implemented. diff --git a/Documentation/devicetree/bindings/mfd/cros-ec.yaml b/Documentation/devicetree/bindings/mfd/cros-ec.yaml new file mode 100644 index 000000000000..6a5b87cebcfa --- /dev/null +++ b/Documentation/devicetree/bindings/mfd/cros-ec.yaml @@ -0,0 +1,111 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mfd/cros-ec.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: ChromeOS Embedded Controller + +maintainers: + - Benson Leung <bleung@chromium.org> + - Enric Balletbo i Serra <enric.balletbo@collabora.com> + - Guenter Roeck <groeck@chromium.org> + +description: | + Google's ChromeOS EC is a microcontroller which talks to the AP and + implements various functions such as keyboard and battery charging. + The EC can be connected through various interfaces (I2C, SPI, and others) + and the compatible string specifies which interface is being used. + +properties: + compatible: + oneOf: + - description: + For implementations of the EC is connected through I2C. + const: google,cros-ec-i2c + - description: + For implementations of the EC is connected through SPI. + const: google,cros-ec-spi + - description: + For implementations of the EC is connected through RPMSG. + const: google,cros-ec-rpmsg + + google,has-vbc-nvram: + description: | + Some implementations of the EC include a small + nvram space used to store verified boot context data. + This boolean flag is used to specify whether this nvram is + present or not. + type: boolean + +required: + - compatible + +allOf: + - if: + properties: + compatible: + const: google,cros-ec-i2c + then: + properties: + reg: + description: I2C slave address + maxItems: 1 + required: + - reg + - if: + properties: + compatible: + const: google,cros-ec-spi + then: + properties: + reg: + description: SPI chip select + maxItems: 1 + google,cros-ec-spi-pre-delay: + description: | + This property specifies the delay in usecs between the + assertion of the CS and the first clock pulse. + google,cros-ec-spi-msg-delay: + description: | + This property specifies the delay in usecs between messages. + required: + - reg + +examples: + # Example for I2C + - | + i2c0 { + #address-cells = <1>; + #size-cells = <0>; + + cros-ec@1e { + compatible = "google,cros-ec-i2c"; + reg = <0x1e>; + interrupts = <6 0>; + interrupt-parent = <&gpx1>; + }; + }; + # Example for SPI + - | + spi0 { + #address-cells = <1>; + #size-cells = <0>; + + cros-ec@0 { + compatible = "google,cros-ec-spi"; + reg = <0x0>; + google,cros-ec-spi-msg-delay = <30>; + interrupts = <99 0>; + interrupt-parent = <&gpio7>; + spi-max-frequency = <5000000>; + }; + }; + # Example for RPMSG + - | + scp0 { + cros-ec@0 { + compatible = "google,cros-ec-rpmsg"; + }; + }; +... -- 2.25.0.341.g760bfbb309-goog
Hi Ikjoon, On 21/1/20 8:47, Ikjoon Jang wrote: > Convert the ChromeOS EC bindings to json-schema. > > Signed-off-by: Ikjoon Jang <ikjn@chromium.org> > --- > v3: node name changed in rpmsg example > v2: cleanup description, fix typos, remove LPC, add add RPMSG example > --- > .../devicetree/bindings/mfd/cros-ec.txt | 76 ------------ > .../devicetree/bindings/mfd/cros-ec.yaml | 111 ++++++++++++++++++ > 2 files changed, 111 insertions(+), 76 deletions(-) > delete mode 100644 Documentation/devicetree/bindings/mfd/cros-ec.txt > create mode 100644 Documentation/devicetree/bindings/mfd/cros-ec.yaml > Still in mfd directory, this is not a MFD driver, please move to chrome/cros-ec.yaml Thanks, Enric > diff --git a/Documentation/devicetree/bindings/mfd/cros-ec.txt b/Documentation/devicetree/bindings/mfd/cros-ec.txt > deleted file mode 100644 > index 4860eabd0f72..000000000000 > --- a/Documentation/devicetree/bindings/mfd/cros-ec.txt > +++ /dev/null > @@ -1,76 +0,0 @@ > -ChromeOS Embedded Controller > - > -Google's ChromeOS EC is a Cortex-M device which talks to the AP and > -implements various function such as keyboard and battery charging. > - > -The EC can be connect through various means (I2C, SPI, LPC, RPMSG) and the > -compatible string used depends on the interface. Each connection method has > -its own driver which connects to the top level interface-agnostic EC driver. > -Other Linux driver (such as cros-ec-keyb for the matrix keyboard) connect to > -the top-level driver. > - > -Required properties (I2C): > -- compatible: "google,cros-ec-i2c" > -- reg: I2C slave address > - > -Required properties (SPI): > -- compatible: "google,cros-ec-spi" > -- reg: SPI chip select > - > -Required properties (RPMSG): > -- compatible: "google,cros-ec-rpmsg" > - > -Optional properties (SPI): > -- google,cros-ec-spi-pre-delay: Some implementations of the EC need a little > - time to wake up from sleep before they can receive SPI transfers at a high > - clock rate. This property specifies the delay, in usecs, between the > - assertion of the CS to the start of the first clock pulse. > -- google,cros-ec-spi-msg-delay: Some implementations of the EC require some > - additional processing time in order to accept new transactions. If the delay > - between transactions is not long enough the EC may not be able to respond > - properly to subsequent transactions and cause them to hang. This property > - specifies the delay, in usecs, introduced between transactions to account > - for the time required by the EC to get back into a state in which new data > - can be accepted. > - > -Required properties (LPC): > -- compatible: "google,cros-ec-lpc" > -- reg: List of (IO address, size) pairs defining the interface uses > - > -Optional properties (all): > -- google,has-vbc-nvram: Some implementations of the EC include a small > - nvram space used to store verified boot context data. This boolean flag > - is used to specify whether this nvram is present or not. > - > -Example for I2C: > - > -i2c@12ca0000 { > - cros-ec@1e { > - reg = <0x1e>; > - compatible = "google,cros-ec-i2c"; > - interrupts = <14 0>; > - interrupt-parent = <&wakeup_eint>; > - wakeup-source; > - }; > - > - > -Example for SPI: > - > -spi@131b0000 { > - ec@0 { > - compatible = "google,cros-ec-spi"; > - reg = <0x0>; > - interrupts = <14 0>; > - interrupt-parent = <&wakeup_eint>; > - wakeup-source; > - spi-max-frequency = <5000000>; > - controller-data { > - cs-gpio = <&gpf0 3 4 3 0>; > - samsung,spi-cs; > - samsung,spi-feedback-delay = <2>; > - }; > - }; > -}; > - > - > -Example for LPC is not supplied as it is not yet implemented. > diff --git a/Documentation/devicetree/bindings/mfd/cros-ec.yaml b/Documentation/devicetree/bindings/mfd/cros-ec.yaml > new file mode 100644 > index 000000000000..6a5b87cebcfa > --- /dev/null > +++ b/Documentation/devicetree/bindings/mfd/cros-ec.yaml > @@ -0,0 +1,111 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/mfd/cros-ec.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: ChromeOS Embedded Controller > + > +maintainers: > + - Benson Leung <bleung@chromium.org> > + - Enric Balletbo i Serra <enric.balletbo@collabora.com> > + - Guenter Roeck <groeck@chromium.org> > + > +description: | > + Google's ChromeOS EC is a microcontroller which talks to the AP and > + implements various functions such as keyboard and battery charging. > + The EC can be connected through various interfaces (I2C, SPI, and others) > + and the compatible string specifies which interface is being used. > + > +properties: > + compatible: > + oneOf: > + - description: > + For implementations of the EC is connected through I2C. > + const: google,cros-ec-i2c > + - description: > + For implementations of the EC is connected through SPI. > + const: google,cros-ec-spi > + - description: > + For implementations of the EC is connected through RPMSG. > + const: google,cros-ec-rpmsg > + > + google,has-vbc-nvram: > + description: | > + Some implementations of the EC include a small > + nvram space used to store verified boot context data. > + This boolean flag is used to specify whether this nvram is > + present or not. > + type: boolean > + > +required: > + - compatible > + > +allOf: > + - if: > + properties: > + compatible: > + const: google,cros-ec-i2c > + then: > + properties: > + reg: > + description: I2C slave address > + maxItems: 1 > + required: > + - reg > + - if: > + properties: > + compatible: > + const: google,cros-ec-spi > + then: > + properties: > + reg: > + description: SPI chip select > + maxItems: 1 > + google,cros-ec-spi-pre-delay: > + description: | > + This property specifies the delay in usecs between the > + assertion of the CS and the first clock pulse. > + google,cros-ec-spi-msg-delay: > + description: | > + This property specifies the delay in usecs between messages. > + required: > + - reg > + > +examples: > + # Example for I2C > + - | > + i2c0 { > + #address-cells = <1>; > + #size-cells = <0>; > + > + cros-ec@1e { > + compatible = "google,cros-ec-i2c"; > + reg = <0x1e>; > + interrupts = <6 0>; > + interrupt-parent = <&gpx1>; > + }; > + }; > + # Example for SPI > + - | > + spi0 { > + #address-cells = <1>; > + #size-cells = <0>; > + > + cros-ec@0 { > + compatible = "google,cros-ec-spi"; > + reg = <0x0>; > + google,cros-ec-spi-msg-delay = <30>; > + interrupts = <99 0>; > + interrupt-parent = <&gpio7>; > + spi-max-frequency = <5000000>; > + }; > + }; > + # Example for RPMSG > + - | > + scp0 { > + cros-ec@0 { > + compatible = "google,cros-ec-rpmsg"; > + }; > + }; > +... >
On Tue, Jan 21, 2020 at 03:47:27PM +0800, Ikjoon Jang wrote: > Convert the ChromeOS EC bindings to json-schema. > > Signed-off-by: Ikjoon Jang <ikjn@chromium.org> > --- > v3: node name changed in rpmsg example > v2: cleanup description, fix typos, remove LPC, add add RPMSG example > --- > .../devicetree/bindings/mfd/cros-ec.txt | 76 ------------ > .../devicetree/bindings/mfd/cros-ec.yaml | 111 ++++++++++++++++++ > 2 files changed, 111 insertions(+), 76 deletions(-) > delete mode 100644 Documentation/devicetree/bindings/mfd/cros-ec.txt > create mode 100644 Documentation/devicetree/bindings/mfd/cros-ec.yaml > -Required properties (LPC): > -- compatible: "google,cros-ec-lpc" > -- reg: List of (IO address, size) pairs defining the interface uses Where did this go? > diff --git a/Documentation/devicetree/bindings/mfd/cros-ec.yaml b/Documentation/devicetree/bindings/mfd/cros-ec.yaml > new file mode 100644 > index 000000000000..6a5b87cebcfa > --- /dev/null > +++ b/Documentation/devicetree/bindings/mfd/cros-ec.yaml > @@ -0,0 +1,111 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/mfd/cros-ec.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: ChromeOS Embedded Controller > + > +maintainers: > + - Benson Leung <bleung@chromium.org> > + - Enric Balletbo i Serra <enric.balletbo@collabora.com> > + - Guenter Roeck <groeck@chromium.org> > + > +description: | > + Google's ChromeOS EC is a microcontroller which talks to the AP and > + implements various functions such as keyboard and battery charging. > + The EC can be connected through various interfaces (I2C, SPI, and others) > + and the compatible string specifies which interface is being used. > + > +properties: > + compatible: > + oneOf: > + - description: > + For implementations of the EC is connected through I2C. > + const: google,cros-ec-i2c > + - description: > + For implementations of the EC is connected through SPI. > + const: google,cros-ec-spi > + - description: > + For implementations of the EC is connected through RPMSG. > + const: google,cros-ec-rpmsg > + > + google,has-vbc-nvram: > + description: | You can drop '|' if there's no formatting to maintain. And you should reflow this. > + Some implementations of the EC include a small > + nvram space used to store verified boot context data. > + This boolean flag is used to specify whether this nvram is > + present or not. > + type: boolean > + > +required: > + - compatible > + > +allOf: > + - if: > + properties: > + compatible: > + const: google,cros-ec-i2c > + then: > + properties: > + reg: > + description: I2C slave address > + maxItems: 1 > + required: > + - reg > + - if: > + properties: > + compatible: > + const: google,cros-ec-spi > + then: > + properties: > + reg: > + description: SPI chip select > + maxItems: 1 > + google,cros-ec-spi-pre-delay: > + description: | > + This property specifies the delay in usecs between the > + assertion of the CS and the first clock pulse. Needs a type reference at a minumum and ideally some constraints. > + google,cros-ec-spi-msg-delay: > + description: | > + This property specifies the delay in usecs between messages. Same here. > + required: > + - reg > + Add: additionalProperties: false > +examples: > + # Example for I2C > + - | > + i2c0 { > + #address-cells = <1>; > + #size-cells = <0>; > + > + cros-ec@1e { > + compatible = "google,cros-ec-i2c"; > + reg = <0x1e>; > + interrupts = <6 0>; Not documented. > + interrupt-parent = <&gpx1>; > + }; > + }; > + # Example for SPI > + - | > + spi0 { > + #address-cells = <1>; > + #size-cells = <0>; > + > + cros-ec@0 { > + compatible = "google,cros-ec-spi"; > + reg = <0x0>; > + google,cros-ec-spi-msg-delay = <30>; > + interrupts = <99 0>; > + interrupt-parent = <&gpio7>; > + spi-max-frequency = <5000000>; > + }; > + }; > + # Example for RPMSG > + - | > + scp0 { > + cros-ec@0 { > + compatible = "google,cros-ec-rpmsg"; > + }; > + }; > +... > -- > 2.25.0.341.g760bfbb309-goog >
On Mon, Jan 27, 2020 at 04:57:13PM +0100, Enric Balletbo i Serra wrote:
> Hi Ikjoon,
>
> On 21/1/20 8:47, Ikjoon Jang wrote:
> > Convert the ChromeOS EC bindings to json-schema.
> >
> > Signed-off-by: Ikjoon Jang <ikjn@chromium.org>
> > ---
> > v3: node name changed in rpmsg example
> > v2: cleanup description, fix typos, remove LPC, add add RPMSG example
> > ---
> > .../devicetree/bindings/mfd/cros-ec.txt | 76 ------------
> > .../devicetree/bindings/mfd/cros-ec.yaml | 111 ++++++++++++++++++
> > 2 files changed, 111 insertions(+), 76 deletions(-)
> > delete mode 100644 Documentation/devicetree/bindings/mfd/cros-ec.txt
> > create mode 100644 Documentation/devicetree/bindings/mfd/cros-ec.yaml
> >
>
> Still in mfd directory, this is not a MFD driver, please move to chrome/cros-ec.yaml
Please don't. Looks to me like the chrome EC has multiple functions and
is a device.
Bindings directories are often 1:1 with kernel driver directories, but
not always.
Rob
Hi Rob, On 27/1/20 17:12, Rob Herring wrote: > On Mon, Jan 27, 2020 at 04:57:13PM +0100, Enric Balletbo i Serra wrote: >> Hi Ikjoon, >> >> On 21/1/20 8:47, Ikjoon Jang wrote: >>> Convert the ChromeOS EC bindings to json-schema. >>> >>> Signed-off-by: Ikjoon Jang <ikjn@chromium.org> >>> --- >>> v3: node name changed in rpmsg example >>> v2: cleanup description, fix typos, remove LPC, add add RPMSG example >>> --- >>> .../devicetree/bindings/mfd/cros-ec.txt | 76 ------------ >>> .../devicetree/bindings/mfd/cros-ec.yaml | 111 ++++++++++++++++++ >>> 2 files changed, 111 insertions(+), 76 deletions(-) >>> delete mode 100644 Documentation/devicetree/bindings/mfd/cros-ec.txt >>> create mode 100644 Documentation/devicetree/bindings/mfd/cros-ec.yaml >>> >> >> Still in mfd directory, this is not a MFD driver, please move to chrome/cros-ec.yaml > > Please don't. Looks to me like the chrome EC has multiple functions and > is a device. > This binding is part of the Chrome EC core and we explicitly moved all this out from mfd subsytem in the past because wasn't really fit as mfd driver. We still have one device driver (cros_ec_dev) in mfd, this is the one that instantiates all the subdevices but the above binding is not related to this one. All the core/bus part is in platform/chrome, looks to me more coherent have the binding accordingly. Anyway I'll let you the final decision, nothing that worries me too much. Thanks, Enric > Bindings directories are often 1:1 with kernel driver directories, but > not always. > > Rob >
Thanks for the reviews, I will send v4 soon, sorry for the late reply. On Tue, Jan 28, 2020 at 12:25 AM Enric Balletbo i Serra <enric.balletbo@collabora.com> wrote: > > Hi Rob, > > On 27/1/20 17:12, Rob Herring wrote: > > On Mon, Jan 27, 2020 at 04:57:13PM +0100, Enric Balletbo i Serra wrote: > >> Hi Ikjoon, > >> > >> On 21/1/20 8:47, Ikjoon Jang wrote: > >>> Convert the ChromeOS EC bindings to json-schema. > >>> > >>> Signed-off-by: Ikjoon Jang <ikjn@chromium.org> > >>> --- > >>> v3: node name changed in rpmsg example > >>> v2: cleanup description, fix typos, remove LPC, add add RPMSG example > >>> --- > >>> .../devicetree/bindings/mfd/cros-ec.txt | 76 ------------ > >>> .../devicetree/bindings/mfd/cros-ec.yaml | 111 ++++++++++++++++++ > >>> 2 files changed, 111 insertions(+), 76 deletions(-) > >>> delete mode 100644 Documentation/devicetree/bindings/mfd/cros-ec.txt > >>> create mode 100644 Documentation/devicetree/bindings/mfd/cros-ec.yaml > >>> > >> > >> Still in mfd directory, this is not a MFD driver, please move to chrome/cros-ec.yaml > > > > Please don't. Looks to me like the chrome EC has multiple functions and > > is a device. > > > > This binding is part of the Chrome EC core and we explicitly moved all this out > from mfd subsytem in the past because wasn't really fit as mfd driver. > > We still have one device driver (cros_ec_dev) in mfd, this is the one that > instantiates all the subdevices but the above binding is not related to this > one. All the core/bus part is in platform/chrome, looks to me more coherent have > the binding accordingly. > > Anyway I'll let you the final decision, nothing that worries me too much. > > Thanks, > Enric > > > Bindings directories are often 1:1 with kernel driver directories, but > > not always. Converting the format at this time. I will keep the same directory in v4. It seems that cros_ec_dev device driver should be changed before moving. > > > > Rob > >
On Tue, Jan 28, 2020 at 12:05 AM Rob Herring <robh@kernel.org> wrote: > > On Tue, Jan 21, 2020 at 03:47:27PM +0800, Ikjoon Jang wrote: > > Convert the ChromeOS EC bindings to json-schema. > > > > Signed-off-by: Ikjoon Jang <ikjn@chromium.org> > > --- > > v3: node name changed in rpmsg example > > v2: cleanup description, fix typos, remove LPC, add add RPMSG example > > --- > > .../devicetree/bindings/mfd/cros-ec.txt | 76 ------------ > > .../devicetree/bindings/mfd/cros-ec.yaml | 111 ++++++++++++++++++ > > 2 files changed, 111 insertions(+), 76 deletions(-) > > delete mode 100644 Documentation/devicetree/bindings/mfd/cros-ec.txt > > create mode 100644 Documentation/devicetree/bindings/mfd/cros-ec.yaml > > > -Required properties (LPC): > > -- compatible: "google,cros-ec-lpc" > > -- reg: List of (IO address, size) pairs defining the interface uses > > Where did this go? I'm not sure about the details or future plans on LPC interface, but I guess LPC has been just a future plan without any usages, so removed it. > > > > diff --git a/Documentation/devicetree/bindings/mfd/cros-ec.yaml b/Documentation/devicetree/bindings/mfd/cros-ec.yaml > > new file mode 100644 > > index 000000000000..6a5b87cebcfa > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/mfd/cros-ec.yaml > > @@ -0,0 +1,111 @@ > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > > +%YAML 1.2 > > +--- > > +$id: http://devicetree.org/schemas/mfd/cros-ec.yaml# > > +$schema: http://devicetree.org/meta-schemas/core.yaml# > > + > > +title: ChromeOS Embedded Controller > > + > > +maintainers: > > + - Benson Leung <bleung@chromium.org> > > + - Enric Balletbo i Serra <enric.balletbo@collabora.com> > > + - Guenter Roeck <groeck@chromium.org> > > + > > +description: | > > + Google's ChromeOS EC is a microcontroller which talks to the AP and > > + implements various functions such as keyboard and battery charging. > > + The EC can be connected through various interfaces (I2C, SPI, and others) > > + and the compatible string specifies which interface is being used. > > + I will drop | here also. > > +properties: > > + compatible: > > + oneOf: > > + - description: > > + For implementations of the EC is connected through I2C. > > + const: google,cros-ec-i2c > > + - description: > > + For implementations of the EC is connected through SPI. > > + const: google,cros-ec-spi > > + - description: > > + For implementations of the EC is connected through RPMSG. > > + const: google,cros-ec-rpmsg > > + > > + google,has-vbc-nvram: > > + description: | > > You can drop '|' if there's no formatting to maintain. And you should > reflow this. Okay, > > > + Some implementations of the EC include a small > > + nvram space used to store verified boot context data. > > + This boolean flag is used to specify whether this nvram is > > + present or not. > > + type: boolean > > + > > +required: > > + - compatible > > + > > +allOf: > > + - if: > > + properties: > > + compatible: > > + const: google,cros-ec-i2c > > + then: > > + properties: > > + reg: > > + description: I2C slave address > > + maxItems: 1 > > + required: > > + - reg > > + - if: > > + properties: > > + compatible: > > + const: google,cros-ec-spi > > + then: > > + properties: > > + reg: > > + description: SPI chip select > > + maxItems: 1 > > + google,cros-ec-spi-pre-delay: > > + description: | > > + This property specifies the delay in usecs between the > > + assertion of the CS and the first clock pulse. > > Needs a type reference at a minumum and ideally some constraints. Got it, I will add a type reference here, and for the constraints, these spi transaction delay cannot be bound. I will just add default: 0 here. > > > + google,cros-ec-spi-msg-delay: > > + description: | > > + This property specifies the delay in usecs between messages. > > Same here. > > > + required: > > + - reg > > + > > Add: > additionalProperties: false Ack. > > > +examples: > > + # Example for I2C > > + - | > > + i2c0 { > > + #address-cells = <1>; > > + #size-cells = <0>; > > + > > + cros-ec@1e { > > + compatible = "google,cros-ec-i2c"; > > + reg = <0x1e>; > > + interrupts = <6 0>; > > Not documented. Sorry but I can't understand this part, can you elaborate on here? Do you mean adding comments here? or need more documentation on cros-ec-i2c? > > > + interrupt-parent = <&gpx1>; > > + }; > > + }; > > + # Example for SPI > > + - | > > + spi0 { > > + #address-cells = <1>; > > + #size-cells = <0>; > > + > > + cros-ec@0 { > > + compatible = "google,cros-ec-spi"; > > + reg = <0x0>; > > + google,cros-ec-spi-msg-delay = <30>; > > + interrupts = <99 0>; > > + interrupt-parent = <&gpio7>; > > + spi-max-frequency = <5000000>; > > + }; > > + }; > > + # Example for RPMSG > > + - | > > + scp0 { > > + cros-ec@0 { > > + compatible = "google,cros-ec-rpmsg"; > > + }; > > + }; > > +... > > -- > > 2.25.0.341.g760bfbb309-goog > >
Convert the ChromeOS EC bindings to json-schema. Signed-off-by: Ikjoon Jang <ikjn@chromium.org> --- v4: text reflows, add type references, and fix examples v3: node name changed in rpmsg example v2: cleanup description, fix typos, remove LPC, and add RPMSG example --- .../devicetree/bindings/mfd/cros-ec.txt | 76 ---------- .../devicetree/bindings/mfd/cros-ec.yaml | 139 ++++++++++++++++++ 2 files changed, 139 insertions(+), 76 deletions(-) delete mode 100644 Documentation/devicetree/bindings/mfd/cros-ec.txt create mode 100644 Documentation/devicetree/bindings/mfd/cros-ec.yaml diff --git a/Documentation/devicetree/bindings/mfd/cros-ec.txt b/Documentation/devicetree/bindings/mfd/cros-ec.txt deleted file mode 100644 index 4860eabd0f72..000000000000 --- a/Documentation/devicetree/bindings/mfd/cros-ec.txt +++ /dev/null @@ -1,76 +0,0 @@ -ChromeOS Embedded Controller - -Google's ChromeOS EC is a Cortex-M device which talks to the AP and -implements various function such as keyboard and battery charging. - -The EC can be connect through various means (I2C, SPI, LPC, RPMSG) and the -compatible string used depends on the interface. Each connection method has -its own driver which connects to the top level interface-agnostic EC driver. -Other Linux driver (such as cros-ec-keyb for the matrix keyboard) connect to -the top-level driver. - -Required properties (I2C): -- compatible: "google,cros-ec-i2c" -- reg: I2C slave address - -Required properties (SPI): -- compatible: "google,cros-ec-spi" -- reg: SPI chip select - -Required properties (RPMSG): -- compatible: "google,cros-ec-rpmsg" - -Optional properties (SPI): -- google,cros-ec-spi-pre-delay: Some implementations of the EC need a little - time to wake up from sleep before they can receive SPI transfers at a high - clock rate. This property specifies the delay, in usecs, between the - assertion of the CS to the start of the first clock pulse. -- google,cros-ec-spi-msg-delay: Some implementations of the EC require some - additional processing time in order to accept new transactions. If the delay - between transactions is not long enough the EC may not be able to respond - properly to subsequent transactions and cause them to hang. This property - specifies the delay, in usecs, introduced between transactions to account - for the time required by the EC to get back into a state in which new data - can be accepted. - -Required properties (LPC): -- compatible: "google,cros-ec-lpc" -- reg: List of (IO address, size) pairs defining the interface uses - -Optional properties (all): -- google,has-vbc-nvram: Some implementations of the EC include a small - nvram space used to store verified boot context data. This boolean flag - is used to specify whether this nvram is present or not. - -Example for I2C: - -i2c@12ca0000 { - cros-ec@1e { - reg = <0x1e>; - compatible = "google,cros-ec-i2c"; - interrupts = <14 0>; - interrupt-parent = <&wakeup_eint>; - wakeup-source; - }; - - -Example for SPI: - -spi@131b0000 { - ec@0 { - compatible = "google,cros-ec-spi"; - reg = <0x0>; - interrupts = <14 0>; - interrupt-parent = <&wakeup_eint>; - wakeup-source; - spi-max-frequency = <5000000>; - controller-data { - cs-gpio = <&gpf0 3 4 3 0>; - samsung,spi-cs; - samsung,spi-feedback-delay = <2>; - }; - }; -}; - - -Example for LPC is not supplied as it is not yet implemented. diff --git a/Documentation/devicetree/bindings/mfd/cros-ec.yaml b/Documentation/devicetree/bindings/mfd/cros-ec.yaml new file mode 100644 index 000000000000..20d54cddc967 --- /dev/null +++ b/Documentation/devicetree/bindings/mfd/cros-ec.yaml @@ -0,0 +1,139 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mfd/cros-ec.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: ChromeOS Embedded Controller + +maintainers: + - Benson Leung <bleung@chromium.org> + - Enric Balletbo i Serra <enric.balletbo@collabora.com> + - Guenter Roeck <groeck@chromium.org> + +description: + Google's ChromeOS EC is a microcontroller which talks to the AP and + implements various functions such as keyboard and battery charging. + The EC can be connected through various interfaces (I2C, SPI, and others) + and the compatible string specifies which interface is being used. + +properties: + compatible: + oneOf: + - description: + For implementations of the EC is connected through I2C. + const: google,cros-ec-i2c + - description: + For implementations of the EC is connected through SPI. + const: google,cros-ec-spi + - description: + For implementations of the EC is connected through RPMSG. + const: google,cros-ec-rpmsg + + google,has-vbc-nvram: + description: + Some implementations of the EC include a small nvram space used to + store verified boot context data. This boolean flag is used to specify + whether this nvram is present or not. + type: boolean + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + +required: + - compatible + +allOf: + - if: + properties: + compatible: + const: google,cros-ec-i2c + then: + properties: + reg: + description: I2C slave address + maxItems: 1 + + required: + - reg + - if: + properties: + compatible: + const: google,cros-ec-spi + then: + properties: + reg: + description: SPI chip select + maxItems: 1 + + google,cros-ec-spi-pre-delay: + description: + This property specifies the delay in usecs between the + assertion of the CS and the first clock pulse. + allOf: + - $ref: /schemas/types.yaml#/definitions/uint32 + - default: 0 + - minimum: 0 + + google,cros-ec-spi-msg-delay: + description: + This property specifies the delay in usecs between messages. + allOf: + - $ref: /schemas/types.yaml#/definitions/uint32 + - default: 0 + - minimum: 0 + + required: + - reg + +additionalProperties: false + +examples: + # Example for I2C + - | + #include <dt-bindings/gpio/gpio.h> + #include <dt-bindings/interrupt-controller/irq.h> + + i2c0 { + #address-cells = <1>; + #size-cells = <0>; + + cros-ec@1e { + compatible = "google,cros-ec-i2c"; + reg = <0x1e>; + interrupts = <6 0>; + interrupt-parent = <&gpio0>; + }; + }; + + # Example for SPI + - | + #include <dt-bindings/gpio/gpio.h> + #include <dt-bindings/interrupt-controller/irq.h> + + spi0 { + #address-cells = <1>; + #size-cells = <0>; + + cros-ec@0 { + compatible = "google,cros-ec-spi"; + reg = <0x0>; + google,cros-ec-spi-msg-delay = <30>; + google,cros-ec-spi-pre-delay = <10>; + interrupts = <99 0>; + interrupt-parent = <&gpio7>; + spi-max-frequency = <5000000>; + }; + }; + + # Example for RPMSG + - | + scp0 { + cros-ec@0 { + compatible = "google,cros-ec-rpmsg"; + }; + }; +... -- 2.25.0.265.gbab2e86ba0-goog
Hi Ikjoon, Two few comments more, and I think will be ready if Rob is fine. On 14/2/20 7:26, Ikjoon Jang wrote: > Convert the ChromeOS EC bindings to json-schema. > > Signed-off-by: Ikjoon Jang <ikjn@chromium.org> > > --- > v4: text reflows, add type references, and fix examples > v3: node name changed in rpmsg example > v2: cleanup description, fix typos, remove LPC, and add RPMSG example > --- > .../devicetree/bindings/mfd/cros-ec.txt | 76 ---------- > .../devicetree/bindings/mfd/cros-ec.yaml | 139 ++++++++++++++++++ > 2 files changed, 139 insertions(+), 76 deletions(-) > delete mode 100644 Documentation/devicetree/bindings/mfd/cros-ec.txt > create mode 100644 Documentation/devicetree/bindings/mfd/cros-ec.yaml > > diff --git a/Documentation/devicetree/bindings/mfd/cros-ec.txt b/Documentation/devicetree/bindings/mfd/cros-ec.txt > deleted file mode 100644 > index 4860eabd0f72..000000000000 > --- a/Documentation/devicetree/bindings/mfd/cros-ec.txt > +++ /dev/null > @@ -1,76 +0,0 @@ > -ChromeOS Embedded Controller > - > -Google's ChromeOS EC is a Cortex-M device which talks to the AP and > -implements various function such as keyboard and battery charging. > - > -The EC can be connect through various means (I2C, SPI, LPC, RPMSG) and the > -compatible string used depends on the interface. Each connection method has > -its own driver which connects to the top level interface-agnostic EC driver. > -Other Linux driver (such as cros-ec-keyb for the matrix keyboard) connect to > -the top-level driver. > - > -Required properties (I2C): > -- compatible: "google,cros-ec-i2c" > -- reg: I2C slave address > - > -Required properties (SPI): > -- compatible: "google,cros-ec-spi" > -- reg: SPI chip select > - > -Required properties (RPMSG): > -- compatible: "google,cros-ec-rpmsg" > - > -Optional properties (SPI): > -- google,cros-ec-spi-pre-delay: Some implementations of the EC need a little > - time to wake up from sleep before they can receive SPI transfers at a high > - clock rate. This property specifies the delay, in usecs, between the > - assertion of the CS to the start of the first clock pulse. > -- google,cros-ec-spi-msg-delay: Some implementations of the EC require some > - additional processing time in order to accept new transactions. If the delay > - between transactions is not long enough the EC may not be able to respond > - properly to subsequent transactions and cause them to hang. This property > - specifies the delay, in usecs, introduced between transactions to account > - for the time required by the EC to get back into a state in which new data > - can be accepted. > - > -Required properties (LPC): > -- compatible: "google,cros-ec-lpc" > -- reg: List of (IO address, size) pairs defining the interface uses > - > -Optional properties (all): > -- google,has-vbc-nvram: Some implementations of the EC include a small > - nvram space used to store verified boot context data. This boolean flag > - is used to specify whether this nvram is present or not. > - > -Example for I2C: > - > -i2c@12ca0000 { > - cros-ec@1e { > - reg = <0x1e>; > - compatible = "google,cros-ec-i2c"; > - interrupts = <14 0>; > - interrupt-parent = <&wakeup_eint>; > - wakeup-source; > - }; > - > - > -Example for SPI: > - > -spi@131b0000 { > - ec@0 { > - compatible = "google,cros-ec-spi"; > - reg = <0x0>; > - interrupts = <14 0>; > - interrupt-parent = <&wakeup_eint>; > - wakeup-source; > - spi-max-frequency = <5000000>; > - controller-data { > - cs-gpio = <&gpf0 3 4 3 0>; > - samsung,spi-cs; > - samsung,spi-feedback-delay = <2>; > - }; > - }; > -}; > - > - > -Example for LPC is not supplied as it is not yet implemented. > diff --git a/Documentation/devicetree/bindings/mfd/cros-ec.yaml b/Documentation/devicetree/bindings/mfd/cros-ec.yaml > new file mode 100644 > index 000000000000..20d54cddc967 > --- /dev/null > +++ b/Documentation/devicetree/bindings/mfd/cros-ec.yaml > @@ -0,0 +1,139 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/mfd/cros-ec.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: ChromeOS Embedded Controller > + > +maintainers: > + - Benson Leung <bleung@chromium.org> > + - Enric Balletbo i Serra <enric.balletbo@collabora.com> > + - Guenter Roeck <groeck@chromium.org> > + > +description: > + Google's ChromeOS EC is a microcontroller which talks to the AP and > + implements various functions such as keyboard and battery charging. > + The EC can be connected through various interfaces (I2C, SPI, and others) > + and the compatible string specifies which interface is being used. > + > +properties: > + compatible: > + oneOf: > + - description: > + For implementations of the EC is connected through I2C. > + const: google,cros-ec-i2c > + - description: > + For implementations of the EC is connected through SPI. > + const: google,cros-ec-spi > + - description: > + For implementations of the EC is connected through RPMSG. > + const: google,cros-ec-rpmsg > + > + google,has-vbc-nvram: > + description: > + Some implementations of the EC include a small nvram space used to > + store verified boot context data. This boolean flag is used to specify > + whether this nvram is present or not. > + type: boolean > + > + reg: > + maxItems: 1 > + > + interrupts: > + maxItems: 1 > + > +required: > + - compatible > + > +allOf: > + - if: > + properties: > + compatible: > + const: google,cros-ec-i2c > + then: > + properties: > + reg: > + description: I2C slave address > + maxItems: 1 > + > + required: > + - reg > + - if: > + properties: > + compatible: > + const: google,cros-ec-spi > + then: > + properties: > + reg: > + description: SPI chip select > + maxItems: 1 > + > + google,cros-ec-spi-pre-delay: > + description: > + This property specifies the delay in usecs between the > + assertion of the CS and the first clock pulse. > + allOf: > + - $ref: /schemas/types.yaml#/definitions/uint32 > + - default: 0 > + - minimum: 0 > + > + google,cros-ec-spi-msg-delay: > + description: > + This property specifies the delay in usecs between messages. > + allOf: > + - $ref: /schemas/types.yaml#/definitions/uint32 > + - default: 0 > + - minimum: 0 > + > + required: > + - reg > + > +additionalProperties: false > + > +examples: Run make dt_binding_check DT_SCHEMA_FILES=Documentation/devicetree/bindings/mfd/cros-ec.yaml to validate the examples, you will get the following error: > + # Example for I2C > + - | > + #include <dt-bindings/gpio/gpio.h> > + #include <dt-bindings/interrupt-controller/irq.h> > + > + i2c0 { > + #address-cells = <1>; > + #size-cells = <0>; > + > + cros-ec@1e { > + compatible = "google,cros-ec-i2c"; > + reg = <0x1e>; > + interrupts = <6 0>; > + interrupt-parent = <&gpio0>; > + }; > + }; > + > + # Example for SPI > + - | > + #include <dt-bindings/gpio/gpio.h> > + #include <dt-bindings/interrupt-controller/irq.h> > + > + spi0 { > + #address-cells = <1>; > + #size-cells = <0>; > + > + cros-ec@0 { > + compatible = "google,cros-ec-spi"; > + reg = <0x0>; > + google,cros-ec-spi-msg-delay = <30>; > + google,cros-ec-spi-pre-delay = <10>; cros-ec@0: 'google,cros-ec-spi-msg-delay', 'google,cros-ec-spi-pre-delay', 'spi-max-frequency' do not match any of the regexes: 'pinctrl-[0-9]+' > + interrupts = <99 0>; > + interrupt-parent = <&gpio7>; > + spi-max-frequency = <5000000>; > + }; > + }; > + > + # Example for RPMSG > + - | > + scp0 { > + cros-ec@0 { I see there is no 'reg' here so no unit-address. > + compatible = "google,cros-ec-rpmsg"; > + }; > + }; > +... >
On Fri, 14 Feb 2020 14:26:14 +0800, Ikjoon Jang wrote: > Convert the ChromeOS EC bindings to json-schema. > > Signed-off-by: Ikjoon Jang <ikjn@chromium.org> > > --- > v4: text reflows, add type references, and fix examples > v3: node name changed in rpmsg example > v2: cleanup description, fix typos, remove LPC, and add RPMSG example > --- > .../devicetree/bindings/mfd/cros-ec.txt | 76 ---------- > .../devicetree/bindings/mfd/cros-ec.yaml | 139 ++++++++++++++++++ > 2 files changed, 139 insertions(+), 76 deletions(-) > delete mode 100644 Documentation/devicetree/bindings/mfd/cros-ec.txt > create mode 100644 Documentation/devicetree/bindings/mfd/cros-ec.yaml > My bot found errors running 'make dt_binding_check' on your patch: Documentation/devicetree/bindings/display/simple-framebuffer.example.dts:21.16-37.11: Warning (chosen_node_is_root): /example-0/chosen: chosen node must be at root node /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/mfd/cros-ec.example.dt.yaml: cros-ec@0: 'google,cros-ec-spi-msg-delay', 'google,cros-ec-spi-pre-delay', 'spi-max-frequency' do not match any of the regexes: 'pinctrl-[0-9]+' See https://patchwork.ozlabs.org/patch/1237876 Please check and re-submit.