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Thu, 13 Feb 2020 04:10:12 +0000 From: Zhiqiang Hou To: linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, bhelgaas@google.com, robh+dt@kernel.org, andrew.murray@arm.com, arnd@arndb.de, mark.rutland@arm.com, l.subrahmanya@mobiveil.co.in, shawnguo@kernel.org, m.karthikeyan@mobiveil.co.in, leoyang.li@nxp.com, lorenzo.pieralisi@arm.com, catalin.marinas@arm.com, will.deacon@arm.com Cc: Mingkai.Hu@nxp.com, Minghuan.Lian@nxp.com, Xiaowei.Bao@nxp.com, Hou Zhiqiang Subject: [PATCHv10 05/13] PCI: mobiveil: Add callback function for interrupt initialization Date: Thu, 13 Feb 2020 12:06:36 +0800 Message-Id: <20200213040644.45858-6-Zhiqiang.Hou@nxp.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200213040644.45858-1-Zhiqiang.Hou@nxp.com> References: <20200213040644.45858-1-Zhiqiang.Hou@nxp.com> Content-Type: text/plain X-ClientProxiedBy: HK2PR04CA0069.apcprd04.prod.outlook.com (2603:1096:202:15::13) To DB8PR04MB6747.eurprd04.prod.outlook.com (2603:10a6:10:10b::31) MIME-Version: 1.0 Received: from localhost.localdomain (119.31.174.73) by HK2PR04CA0069.apcprd04.prod.outlook.com (2603:1096:202:15::13) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.2729.24 via Frontend Transport; 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X-Microsoft-Antispam-Message-Info: g/T+NzoOm97WQ0DAg/Hj5bCIF77Fpz0oIR7rPvtT3JvbDLDfeagFz1mawehJst8JeA93lFpnojxYSCJRCorNkxoaOvlmuMIgKyHjFV2LJC/iJ2hehEC16YMxg8kP5td9jZTU/IZivWQ2WdiDtnmP/WzCyafsvwFkoPhz0MB02OgoAT9+kVX0gfrlwURdVa4YCM0gpF+BGecEzmJZSm5KdE2uGzpGZQT2+AEMndQtcM5xQs69K5olq8G9uWMmGdNW4NS4QLDb3OYjUUnCJdewrS7YXa7fkjrxQh+5y7N3GjYQS6AXSdMwfJrTZWaa/6g6/9hut+vywMmY2LFXz7lMPifMLegSRemIhwDqy9PJVtqGCgJLH0e4ac+xsF5ic7UmAS/X+6hY8+QqDY1f4uQskiTGkti1n+vy133nbtf+PPvRAK6a4Jl3D7DNynTohE3+9urDxnBHnJqRfW82ZTRPzpGGMCgKMgVoB3TJjB16QfQlBnvxlvzZWs3CSbLlOC5MsXCUTNfDLpUlNqCFm4hM1WC1m3OR0ixF1BZ830QP1806hqd7D3UtQ9YIE4HdXezwPDdvU7D3ISC0YJBAQTpFgQ== X-MS-Exchange-AntiSpam-MessageData: 4dMJHIAJhmm9XZnz/gp2af/ZuJ1gTIU5GL7rngZBCRmOyBslihr+goCnxTnxN8IMG4BX8SNMdaBdFRJpTXbxwgn+fQE6ccoXTPk+TfIz35ApMb+0iVqNgLM/yx/taAXdjUOm1qubb2Ir5KJuNKoBIQ== X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: ad1fa72d-9276-4446-6891-08d7b03a9f11 X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Feb 2020 04:10:12.2302 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: b/zwk2tUuVEIHjyAdSrN7gzPM55gi0+wmTkbGv81/uTFuPqFbEfsv1PG3yiywMBdjf/t3+BF1WNRPbMjj5ZFog== X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB8PR04MB7084 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Hou Zhiqiang The Mobiveil GPEX internal MSI/INTx controller may not be used by other platforms in which the Mobiveil GPEX is integrated. This patch is to allow these platforms to implement their specific interrupt initialization. Signed-off-by: Hou Zhiqiang --- V10: - Introduced a helper function mobiveil_pcie_integrated_interrupt_init(). drivers/pci/controller/mobiveil/pcie-mobiveil-host.c | 12 +++++++++++- drivers/pci/controller/mobiveil/pcie-mobiveil.h | 7 +++++++ 2 files changed, 18 insertions(+), 1 deletion(-) diff --git a/drivers/pci/controller/mobiveil/pcie-mobiveil-host.c b/drivers/pci/controller/mobiveil/pcie-mobiveil-host.c index ea90d2f8692e..53ab8412a1de 100644 --- a/drivers/pci/controller/mobiveil/pcie-mobiveil-host.c +++ b/drivers/pci/controller/mobiveil/pcie-mobiveil-host.c @@ -499,7 +499,7 @@ static int mobiveil_pcie_init_irq_domain(struct mobiveil_pcie *pcie) return 0; } -static int mobiveil_pcie_interrupt_init(struct mobiveil_pcie *pcie) +static int mobiveil_pcie_integrated_interrupt_init(struct mobiveil_pcie *pcie) { struct platform_device *pdev = pcie->pdev; struct device *dev = &pdev->dev; @@ -539,6 +539,16 @@ static int mobiveil_pcie_interrupt_init(struct mobiveil_pcie *pcie) return 0; } +static int mobiveil_pcie_interrupt_init(struct mobiveil_pcie *pcie) +{ + struct mobiveil_root_port *rp = &pcie->rp; + + if (rp->ops->interrupt_init) + return rp->ops->interrupt_init(pcie); + + return mobiveil_pcie_integrated_interrupt_init(pcie); +} + int mobiveil_pcie_host_probe(struct mobiveil_pcie *pcie) { struct mobiveil_root_port *rp = &pcie->rp; diff --git a/drivers/pci/controller/mobiveil/pcie-mobiveil.h b/drivers/pci/controller/mobiveil/pcie-mobiveil.h index 81ffbbd48c08..0e6b5468c026 100644 --- a/drivers/pci/controller/mobiveil/pcie-mobiveil.h +++ b/drivers/pci/controller/mobiveil/pcie-mobiveil.h @@ -130,10 +130,17 @@ struct mobiveil_msi { /* MSI information */ DECLARE_BITMAP(msi_irq_in_use, PCI_NUM_MSI); }; +struct mobiveil_pcie; + +struct mobiveil_rp_ops { + int (*interrupt_init)(struct mobiveil_pcie *pcie); +}; + struct mobiveil_root_port { char root_bus_nr; void __iomem *config_axi_slave_base; /* endpoint config base */ struct resource *ob_io_res; + struct mobiveil_rp_ops *ops; int irq; raw_spinlock_t intx_mask_lock; struct irq_domain *intx_domain; -- 2.17.1