From: Jean-Philippe Brucker <jean-philippe@linaro.org>
To: bhelgaas@google.com, will@kernel.org, robh+dt@kernel.org,
lorenzo.pieralisi@arm.com, joro@8bytes.org,
baolu.lu@linux.intel.com, linux-doc@vger.kernel.org,
linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
devicetree@vger.kernel.org, linux-acpi@vger.kernel.org,
iommu@lists.linux-foundation.org
Cc: corbet@lwn.net, mark.rutland@arm.com, liviu.dudau@arm.com,
sudeep.holla@arm.com, guohanjun@huawei.com, rjw@rjwysocki.net,
lenb@kernel.org, robin.murphy@arm.com, dwmw2@infradead.org,
amurray@thegoodpenguin.co.uk, frowand.list@gmail.com
Subject: [PATCH 04/11] ACPI/IORT: Check ATS capability in root complex node
Date: Thu, 13 Feb 2020 17:50:42 +0100 [thread overview]
Message-ID: <20200213165049.508908-5-jean-philippe@linaro.org> (raw)
In-Reply-To: <20200213165049.508908-1-jean-philippe@linaro.org>
When initializing a PCI root bridge, copy its "ATS supported" attribute
into the root bridge.
Signed-off-by: Jean-Philippe Brucker <jean-philippe@linaro.org>
---
drivers/acpi/arm64/iort.c | 27 +++++++++++++++++++++++++++
drivers/acpi/pci_root.c | 3 +++
include/linux/acpi_iort.h | 8 ++++++++
3 files changed, 38 insertions(+)
diff --git a/drivers/acpi/arm64/iort.c b/drivers/acpi/arm64/iort.c
index ed3d2d1a7ae9..d99d7f5b51e1 100644
--- a/drivers/acpi/arm64/iort.c
+++ b/drivers/acpi/arm64/iort.c
@@ -1633,6 +1633,33 @@ static void __init iort_enable_acs(struct acpi_iort_node *iort_node)
}
}
}
+
+static acpi_status iort_match_host_bridge_callback(struct acpi_iort_node *node,
+ void *context)
+{
+ struct acpi_iort_root_complex *pci_rc;
+ struct pci_host_bridge *host_bridge = context;
+
+ pci_rc = (struct acpi_iort_root_complex *)node->node_data;
+
+ return pci_domain_nr(host_bridge->bus) == pci_rc->pci_segment_number ?
+ AE_OK : AE_NOT_FOUND;
+}
+
+void iort_pci_host_bridge_setup(struct pci_host_bridge *host_bridge)
+{
+ struct acpi_iort_node *node;
+ struct acpi_iort_root_complex *pci_rc;
+
+ node = iort_scan_node(ACPI_IORT_NODE_PCI_ROOT_COMPLEX,
+ iort_match_host_bridge_callback, host_bridge);
+ if (!node)
+ return;
+
+ pci_rc = (struct acpi_iort_root_complex *)node->node_data;
+ host_bridge->ats_supported = !!(pci_rc->ats_attribute &
+ ACPI_IORT_ATS_SUPPORTED);
+}
#else
static inline void iort_enable_acs(struct acpi_iort_node *iort_node) { }
#endif
diff --git a/drivers/acpi/pci_root.c b/drivers/acpi/pci_root.c
index d1e666ef3fcc..eb2fb8f17c0b 100644
--- a/drivers/acpi/pci_root.c
+++ b/drivers/acpi/pci_root.c
@@ -6,6 +6,7 @@
* Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
*/
+#include <linux/acpi_iort.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/init.h>
@@ -917,6 +918,8 @@ struct pci_bus *acpi_pci_root_create(struct acpi_pci_root *root,
if (!(root->osc_control_set & OSC_PCI_EXPRESS_LTR_CONTROL))
host_bridge->native_ltr = 0;
+ iort_pci_host_bridge_setup(host_bridge);
+
/*
* Evaluate the "PCI Boot Configuration" _DSM Function. If it
* exists and returns 0, we must preserve any PCI resource
diff --git a/include/linux/acpi_iort.h b/include/linux/acpi_iort.h
index 8e7e2ec37f1b..7b06871cc3aa 100644
--- a/include/linux/acpi_iort.h
+++ b/include/linux/acpi_iort.h
@@ -10,6 +10,7 @@
#include <linux/acpi.h>
#include <linux/fwnode.h>
#include <linux/irqdomain.h>
+#include <linux/pci.h>
#define IORT_IRQ_MASK(irq) (irq & 0xffffffffULL)
#define IORT_IRQ_TRIGGER_MASK(irq) ((irq >> 32) & 0xffffffffULL)
@@ -55,4 +56,11 @@ int iort_iommu_msi_get_resv_regions(struct device *dev, struct list_head *head)
{ return 0; }
#endif
+#if defined(CONFIG_ACPI_IORT) && defined(CONFIG_PCI)
+void iort_pci_host_bridge_setup(struct pci_host_bridge *host_bridge);
+#else
+static inline
+void iort_pci_host_bridge_setup(struct pci_host_bridge *host_bridge) { }
+#endif
+
#endif /* __ACPI_IORT_H__ */
--
2.25.0
next prev parent reply other threads:[~2020-02-13 16:52 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-02-13 16:50 [PATCH 00/10] PCI/ATS: Device-tree support and other improvements Jean-Philippe Brucker
2020-02-13 16:50 ` [PATCH 01/11] dt-bindings: PCI: generic: Add ats-supported property Jean-Philippe Brucker
2020-02-19 22:24 ` Rob Herring
2020-02-13 16:50 ` [PATCH 02/11] PCI: Add ats_supported host bridge flag Jean-Philippe Brucker
2020-02-15 21:10 ` Bjorn Helgaas
2020-02-17 15:40 ` Jean-Philippe Brucker
2020-02-13 16:50 ` [PATCH 03/11] PCI: OF: Check whether the host bridge supports ATS Jean-Philippe Brucker
2020-02-13 18:26 ` Rob Herring
2020-02-17 12:40 ` Jean-Philippe Brucker
2020-02-13 16:50 ` Jean-Philippe Brucker [this message]
2020-03-06 9:37 ` [PATCH 04/11] ACPI/IORT: Check ATS capability in root complex node Hanjun Guo
2020-02-13 16:50 ` [PATCH 05/11] PCI/ATS: Gather checks into pci_ats_supported() Jean-Philippe Brucker
2020-02-13 16:50 ` [PATCH 06/11] iommu/amd: Use pci_ats_supported() Jean-Philippe Brucker
2020-02-13 16:50 ` [PATCH 07/11] iommu/arm-smmu-v3: " Jean-Philippe Brucker
2020-02-13 16:50 ` [PATCH 08/11] iommu/vt-d: " Jean-Philippe Brucker
2020-02-13 16:50 ` [PATCH 09/11] ACPI/IORT: Drop ATS fwspec flag Jean-Philippe Brucker
2020-03-06 9:42 ` Hanjun Guo
2020-02-13 16:50 ` [PATCH 10/11] arm64: dts: fast models: Enable PCIe ATS for Base RevC FVP Jean-Philippe Brucker
2020-02-13 16:50 ` [PATCH 11/11] Documentation: Generalize the "pci=noats" boot parameter Jean-Philippe Brucker
2020-02-19 10:42 ` [PATCH 00/10] PCI/ATS: Device-tree support and other improvements Joerg Roedel
2020-03-06 9:32 ` Hanjun Guo
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