From: Sam Ravnborg <sam@ravnborg.org>
To: Jordan Crouse <jcrouse@codeaurora.org>
Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,
David Airlie <airlied@linux.ie>,
freedreno@lists.freedesktop.org, smasetty@codeaurora.org,
linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org,
Rob Herring <robh+dt@kernel.org>, Sean Paul <sean@poorly.run>
Subject: Re: [PATCH v3 1/2] dt-bindings: display: msm: Convert GMU bindings to YAML
Date: Mon, 2 Mar 2020 21:49:06 +0100 [thread overview]
Message-ID: <20200302204906.GA32123@ravnborg.org> (raw)
In-Reply-To: <1583173424-21832-2-git-send-email-jcrouse@codeaurora.org>
Hi Jordan.
On Mon, Mar 02, 2020 at 11:23:43AM -0700, Jordan Crouse wrote:
> Convert display/msm/gmu.txt to display/msm/gmu.yaml and remove the old
> text bindings.
>
> Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
> ---
>
> .../devicetree/bindings/display/msm/gmu.txt | 116 -------------------
> -
> -Required properties:
> -- compatible: "qcom,adreno-gmu-XYZ.W", "qcom,adreno-gmu"
> - for example: "qcom,adreno-gmu-630.2", "qcom,adreno-gmu"
> - Note that you need to list the less specific "qcom,adreno-gmu"
> - for generic matches and the more specific identifier to identify
> - the specific device.
> -- reg: Physical base address and length of the GMU registers.
> -- reg-names: Matching names for the register regions
> - * "gmu"
> - * "gmu_pdc"
> - * "gmu_pdc_seg"
> -- interrupts: The interrupt signals from the GMU.
> -- interrupt-names: Matching names for the interrupts
> - * "hfi"
> - * "gmu"
> -- clocks: phandles to the device clocks
> -- clock-names: Matching names for the clocks
> - * "gmu"
> - * "cxo"
> - * "axi"
> - * "mnoc"
The new binding - and arch/arm64/boot/dts/qcom/sdm845.dtsi agrees that
"mnoc" is wrong.
> -- power-domains: should be:
> - <&clock_gpucc GPU_CX_GDSC>
> - <&clock_gpucc GPU_GX_GDSC>
> -- power-domain-names: Matching names for the power domains
> -- iommus: phandle to the adreno iommu
> -- operating-points-v2: phandle to the OPP operating points
> -
> -Optional properties:
> -- sram: phandle to the On Chip Memory (OCMEM) that's present on some Snapdragon
> - SoCs. See Documentation/devicetree/bindings/sram/qcom,ocmem.yaml.
This property is not included in the new binding.
Everything else looked fine to me.
With sram added - or expalined in commit why it is dropped:
Acked-by: Sam Ravnborg <sam@ravnborg.org>
Sam
next prev parent reply other threads:[~2020-03-02 20:49 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-03-02 18:23 [PATCH v3 0/2] msm/gpu/a6xx: use the DMA-API for GMU memory allocations Jordan Crouse
2020-03-02 18:23 ` [PATCH v3 1/2] dt-bindings: display: msm: Convert GMU bindings to YAML Jordan Crouse
2020-03-02 20:49 ` Sam Ravnborg [this message]
2020-03-03 15:43 ` [Freedreno] " Jordan Crouse
2020-03-03 15:50 ` Jeffrey Hugo
2020-03-03 15:54 ` Brian Masney
2020-03-03 17:01 ` Jordan Crouse
2020-03-03 17:16 ` Brian Masney
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