From: Geert Uytterhoeven <geert+renesas@glider.be>
To: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>,
"David S . Miller" <davem@davemloft.net>,
Jakub Kicinski <kuba@kernel.org>,
Rob Herring <robh+dt@kernel.org>
Cc: Andrew Lunn <andrew@lunn.ch>,
Oleksij Rempel <linux@rempel-privat.de>,
Philippe Schenker <philippe.schenker@toradex.com>,
Florian Fainelli <f.fainelli@gmail.com>,
Heiner Kallweit <hkallweit1@gmail.com>,
Kazuya Mizuguchi <kazuya.mizuguchi.ks@renesas.com>,
Wolfram Sang <wsa+renesas@sang-engineering.com>,
netdev@vger.kernel.org, devicetree@vger.kernel.org,
linux-renesas-soc@vger.kernel.org,
Geert Uytterhoeven <geert+renesas@glider.be>
Subject: [PATCH/RFC 5/5] arm64: dts: renesas: rzg2: Convert EtherAVB to explicit delay handling
Date: Fri, 19 Jun 2020 21:15:54 +0200 [thread overview]
Message-ID: <20200619191554.24942-6-geert+renesas@glider.be> (raw)
In-Reply-To: <20200619191554.24942-1-geert+renesas@glider.be>
Some EtherAVB variants support internal clock delay configuration, which
can add larger delays than the delays that are typically supported by
the PHY (using an "rgmii-*id" PHY mode, and/or "[rt]xc-skew-ps"
properties).
Historically, the EtherAVB driver configured these delays based on the
"rgmii-*id" PHY mode. This was wrong, as these are meant solely for the
PHY, not for the MAC. Hence properties were introduced for explicit
configuration of these delays.
Convert the RZ/G2 DTS files from the old to the new scheme:
- Add default "renesas,rxc-delay-ps" and "renesas,txc-delay-ps"
properties to the SoC .dtsi files, to be overridden by board files
where needed,
- Convert board files from "rgmii-*id" PHY modes to "rgmii", adding
the appropriate "renesas,rxc-delay-ps" and/or "renesas,txc-delay-ps"
overrides.
Notes:
- RZ/G2E does not support TX internal delay handling.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
This depends on "[PATCH/RFC 3/5] ravb: Add support for explicit internal
clock delay configuration" and must not be applied before that
dependency has hit upstream.
---
arch/arm64/boot/dts/renesas/hihope-rzg2-ex.dtsi | 2 +-
arch/arm64/boot/dts/renesas/r8a774a1.dtsi | 2 ++
arch/arm64/boot/dts/renesas/r8a774b1.dtsi | 2 ++
arch/arm64/boot/dts/renesas/r8a774c0.dtsi | 1 +
4 files changed, 6 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/renesas/hihope-rzg2-ex.dtsi b/arch/arm64/boot/dts/renesas/hihope-rzg2-ex.dtsi
index acfcfd050a6cb2d5..c2ce2aaea6e6d64b 100644
--- a/arch/arm64/boot/dts/renesas/hihope-rzg2-ex.dtsi
+++ b/arch/arm64/boot/dts/renesas/hihope-rzg2-ex.dtsi
@@ -19,7 +19,7 @@
pinctrl-0 = <&avb_pins>;
pinctrl-names = "default";
phy-handle = <&phy0>;
- phy-mode = "rgmii-txid";
+ renesas,txc-delay-ps = <2000>;
status = "okay";
phy0: ethernet-phy@0 {
diff --git a/arch/arm64/boot/dts/renesas/r8a774a1.dtsi b/arch/arm64/boot/dts/renesas/r8a774a1.dtsi
index 51a572898fd68a7d..192900c716990860 100644
--- a/arch/arm64/boot/dts/renesas/r8a774a1.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a774a1.dtsi
@@ -1115,6 +1115,8 @@
power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
resets = <&cpg 812>;
phy-mode = "rgmii";
+ renesas,rxc-delay-ps = <0>;
+ renesas,txc-delay-ps = <0>;
iommus = <&ipmmu_ds0 16>;
#address-cells = <1>;
#size-cells = <0>;
diff --git a/arch/arm64/boot/dts/renesas/r8a774b1.dtsi b/arch/arm64/boot/dts/renesas/r8a774b1.dtsi
index b221f2575e6328f9..3e50541750e93f88 100644
--- a/arch/arm64/boot/dts/renesas/r8a774b1.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a774b1.dtsi
@@ -989,6 +989,8 @@
power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
resets = <&cpg 812>;
phy-mode = "rgmii";
+ renesas,rxc-delay-ps = <0>;
+ renesas,txc-delay-ps = <0>;
iommus = <&ipmmu_ds0 16>;
#address-cells = <1>;
#size-cells = <0>;
diff --git a/arch/arm64/boot/dts/renesas/r8a774c0.dtsi b/arch/arm64/boot/dts/renesas/r8a774c0.dtsi
index 5c72a7efbb035d02..a478450090f20e0b 100644
--- a/arch/arm64/boot/dts/renesas/r8a774c0.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a774c0.dtsi
@@ -960,6 +960,7 @@
power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
resets = <&cpg 812>;
phy-mode = "rgmii";
+ renesas,rxc-delay-ps = <0>;
iommus = <&ipmmu_ds0 16>;
#address-cells = <1>;
#size-cells = <0>;
--
2.17.1
prev parent reply other threads:[~2020-06-19 19:16 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-06-19 19:15 [PATCH/RFC 0/5] ravb: Add support for explicit internal clock delay configuration Geert Uytterhoeven
2020-06-19 19:15 ` [PATCH/RFC 1/5] dt-bindings: net: renesas,ravb: Document internal clock delay properties Geert Uytterhoeven
2020-06-20 5:47 ` Oleksij Rempel
2020-06-20 14:43 ` Andrew Lunn
2020-06-21 8:23 ` Geert Uytterhoeven
2020-06-20 18:15 ` Sergei Shtylyov
2020-06-21 8:26 ` Geert Uytterhoeven
2020-06-19 19:15 ` [PATCH/RFC 2/5] ravb: Split delay handling in parsing and applying Geert Uytterhoeven
2020-06-20 18:34 ` Sergei Shtylyov
2020-06-19 19:15 ` [PATCH/RFC 3/5] ravb: Add support for explicit internal clock delay configuration Geert Uytterhoeven
2020-06-20 19:03 ` Sergei Shtylyov
2020-06-19 19:15 ` [PATCH/RFC 4/5] arm64: dts: renesas: rcar-gen3: Convert EtherAVB to explicit delay handling Geert Uytterhoeven
2020-06-19 19:15 ` Geert Uytterhoeven [this message]
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20200619191554.24942-6-geert+renesas@glider.be \
--to=geert+renesas@glider.be \
--cc=andrew@lunn.ch \
--cc=davem@davemloft.net \
--cc=devicetree@vger.kernel.org \
--cc=f.fainelli@gmail.com \
--cc=hkallweit1@gmail.com \
--cc=kazuya.mizuguchi.ks@renesas.com \
--cc=kuba@kernel.org \
--cc=linux-renesas-soc@vger.kernel.org \
--cc=linux@rempel-privat.de \
--cc=netdev@vger.kernel.org \
--cc=philippe.schenker@toradex.com \
--cc=robh+dt@kernel.org \
--cc=sergei.shtylyov@cogentembedded.com \
--cc=wsa+renesas@sang-engineering.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).