[PATCH v2 0/9] ARM: mstar: DT filling out

[PATCH v2 0/9] ARM: mstar: DT filling out

[Daniel Palmer]

This series adds a few low hanging fruit that are purely DT changes to
keep the ball rolling while I work on series for more complicated things
like the interrupt controllers.

Summary of changes:

- Adds the IMI SRAM region and sets the right size for each family
- Adds the ARM PMU
- Adds a syscon for a lump of registers called "pmsleep"
- Uses the pmsleep syscon to enable reboot

Changes since v1:

- pmsleep node has been given it's own compatible string alongside
  the generic syscon based on Arnd's feedback.

- dt binding description has been added for the above.

- To avoid having to update MAINTAINERS repeatly I've moved the existing
  two binding descriptions in with the pmsleep one in arm/mstar.

Daniel Palmer (9):
  dt-bindings: arm: mstar: Add binding details for mstar,pmsleep
  dt-bindings: arm: mstar: Move existing MStar binding descriptions
  ARM: mstar: Add IMI SRAM region
  ARM: mstar: Adjust IMI size of infinity
  ARM: mstar: Adjust IMI size for mercury5
  ARM: mstar: Adjust IMI size for infinity3
  ARM: mstar: Add PMU
  ARM: mstar: Add "pmsleep" node to base dtsi
  ARM: mstar: Add reboot support

 .../{misc => arm/mstar}/mstar,l3bridge.yaml   |  2 +-
 .../bindings/arm/mstar/mstar,pmsleep.yaml     | 43 +++++++++++++++++++
 .../bindings/arm/{ => mstar}/mstar.yaml       |  2 +-
 MAINTAINERS                                   |  2 +-
 arch/arm/boot/dts/infinity.dtsi               |  4 ++
 arch/arm/boot/dts/infinity3.dtsi              |  4 ++
 arch/arm/boot/dts/mercury5.dtsi               |  4 ++
 arch/arm/boot/dts/mstar-v7.dtsi               | 26 ++++++++++-
 8 files changed, 83 insertions(+), 4 deletions(-)
 rename Documentation/devicetree/bindings/{misc => arm/mstar}/mstar,l3bridge.yaml (93%)
 create mode 100644 Documentation/devicetree/bindings/arm/mstar/mstar,pmsleep.yaml
 rename Documentation/devicetree/bindings/arm/{ => mstar}/mstar.yaml (93%)

-- 
2.27.0

[PATCH v2 1/9] dt-bindings: arm: mstar: Add binding details for mstar,pmsleep

[Daniel Palmer]

This adds a YAML description of the pmsleep node used by
MStar/SigmaStar Armv7 SoCs.

Signed-off-by: Daniel Palmer <daniel@0x0f.com>
---
 .../bindings/arm/mstar/mstar,pmsleep.yaml     | 43 +++++++++++++++++++
 MAINTAINERS                                   |  1 +
 2 files changed, 44 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/arm/mstar/mstar,pmsleep.yaml

diff --git a/Documentation/devicetree/bindings/arm/mstar/mstar,pmsleep.yaml b/Documentation/devicetree/bindings/arm/mstar/mstar,pmsleep.yaml
new file mode 100644
index 000000000000..ef78097a7087
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/mstar/mstar,pmsleep.yaml
@@ -0,0 +1,43 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+# Copyright 2020 thingy.jp.
+%YAML 1.2
+---
+$id: "http://devicetree.org/schemas/arm/mstar/mstar,pmsleep.yaml#"
+$schema: "http://devicetree.org/meta-schemas/core.yaml#"
+
+title: MStar/SigmaStar Armv7 SoC pmsleep register region
+
+maintainers:
+  - Daniel Palmer <daniel@thingy.jp>
+
+description: |
+  MStar/Sigmastar's Armv7 SoCs contain a region of registers that are
+  in the always on domain that the vendor code calls the "pmsleep" area.
+
+  This area contains registers and bits for a broad range of functionality
+  ranging from registers that control going into deep sleep to bits that
+  turn things like the internal temperature sensor on and off.
+
+properties:
+  compatible:
+    oneOf:
+      - items:
+         - enum:
+             - mstar,pmsleep
+         - const: syscon
+
+  reg:
+    maxItems: 1
+
+required:
+  - compatible
+  - reg
+
+additionalProperties: false
+
+examples:
+  - |
+    pmsleep: pmsleep@1c00 {
+        compatible = "mstar,pmsleep", "syscon";
+        reg = <0x0x1c00 0x100>;
+    };
diff --git a/MAINTAINERS b/MAINTAINERS
index 991814ea6f76..432fcc867ed6 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -2140,6 +2140,7 @@ L:	linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
 S:	Maintained
 W:	http://linux-chenxing.org/
 F:	Documentation/devicetree/bindings/arm/mstar.yaml
+F:	Documentation/devicetree/bindings/arm/mstar/*
 F:	arch/arm/boot/dts/infinity*.dtsi
 F:	arch/arm/boot/dts/mercury*.dtsi
 F:	arch/arm/boot/dts/mstar-v7.dtsi
-- 
2.27.0

[PATCH v2 2/9] dt-bindings: arm: mstar: Move existing MStar binding descriptions

[Daniel Palmer]

Now there is an mstar directory move the existing MStar specific
descriptions into that directory.

Signed-off-by: Daniel Palmer <daniel@0x0f.com>
---
 .../devicetree/bindings/{misc => arm/mstar}/mstar,l3bridge.yaml | 2 +-
 Documentation/devicetree/bindings/arm/{ => mstar}/mstar.yaml    | 2 +-
 MAINTAINERS                                                     | 1 -
 3 files changed, 2 insertions(+), 3 deletions(-)
 rename Documentation/devicetree/bindings/{misc => arm/mstar}/mstar,l3bridge.yaml (93%)
 rename Documentation/devicetree/bindings/arm/{ => mstar}/mstar.yaml (93%)

diff --git a/Documentation/devicetree/bindings/misc/mstar,l3bridge.yaml b/Documentation/devicetree/bindings/arm/mstar/mstar,l3bridge.yaml
similarity index 93%
rename from Documentation/devicetree/bindings/misc/mstar,l3bridge.yaml
rename to Documentation/devicetree/bindings/arm/mstar/mstar,l3bridge.yaml
index cb7fd1cdfb1a..6816bd68f9cf 100644
--- a/Documentation/devicetree/bindings/misc/mstar,l3bridge.yaml
+++ b/Documentation/devicetree/bindings/arm/mstar/mstar,l3bridge.yaml
@@ -2,7 +2,7 @@
 # Copyright 2020 thingy.jp.
 %YAML 1.2
 ---
-$id: "http://devicetree.org/schemas/misc/mstar,l3bridge.yaml#"
+$id: "http://devicetree.org/schemas/arm/mstar/mstar,l3bridge.yaml#"
 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
 
 title: MStar/SigmaStar Armv7 SoC l3bridge
diff --git a/Documentation/devicetree/bindings/arm/mstar.yaml b/Documentation/devicetree/bindings/arm/mstar/mstar.yaml
similarity index 93%
rename from Documentation/devicetree/bindings/arm/mstar.yaml
rename to Documentation/devicetree/bindings/arm/mstar/mstar.yaml
index bdce34b3336e..c2f980b00b06 100644
--- a/Documentation/devicetree/bindings/arm/mstar.yaml
+++ b/Documentation/devicetree/bindings/arm/mstar/mstar.yaml
@@ -1,7 +1,7 @@
 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
 %YAML 1.2
 ---
-$id: http://devicetree.org/schemas/arm/mstar.yaml#
+$id: http://devicetree.org/schemas/arm/mstar/mstar.yaml#
 $schema: http://devicetree.org/meta-schemas/core.yaml#
 
 title: MStar platforms device tree bindings
diff --git a/MAINTAINERS b/MAINTAINERS
index 432fcc867ed6..9b35edac7ef7 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -2139,7 +2139,6 @@ M:	Daniel Palmer <daniel@thingy.jp>
 L:	linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
 S:	Maintained
 W:	http://linux-chenxing.org/
-F:	Documentation/devicetree/bindings/arm/mstar.yaml
 F:	Documentation/devicetree/bindings/arm/mstar/*
 F:	arch/arm/boot/dts/infinity*.dtsi
 F:	arch/arm/boot/dts/mercury*.dtsi
-- 
2.27.0

[PATCH v2 3/9] ARM: mstar: Add IMI SRAM region

[Daniel Palmer]

All MStar v7 SoCs have an internal SRAM region that is between 64KB
(infinity2m) and 128KB(infinity3, mercury5).

The region is always at the same base address and is used for the
second stage loader (MStar IPL or u-boot SPL) and will be used for
the DDR self-refresh entry code within the kernel eventually.

This patch adds a 128KB region to the SoC and the minimum 64KB SRAM
region to the base dtsi. Families with more SRAM will override the
size in their family level dtsi.

Signed-off-by: Daniel Palmer <daniel@0x0f.com>
---
 arch/arm/boot/dts/mstar-v7.dtsi | 8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/mstar-v7.dtsi b/arch/arm/boot/dts/mstar-v7.dtsi
index 3b99bb435bb5..1941f88a69a5 100644
--- a/arch/arm/boot/dts/mstar-v7.dtsi
+++ b/arch/arm/boot/dts/mstar-v7.dtsi
@@ -45,7 +45,8 @@ soc: soc {
 		#address-cells = <1>;
 		#size-cells = <1>;
 		ranges = <0x16001000 0x16001000 0x00007000>,
-			 <0x1f000000 0x1f000000 0x00400000>;
+			 <0x1f000000 0x1f000000 0x00400000>,
+			 <0xa0000000 0xa0000000 0x20000>;
 
 		gic: interrupt-controller@16001000 {
 			compatible = "arm,cortex-a7-gic";
@@ -79,5 +80,10 @@ pm_uart: uart@221000 {
 				status = "disabled";
 			};
 		};
+
+		imi: sram@a0000000 {
+			compatible = "mmio-sram";
+			reg = <0xa0000000 0x10000>;
+		};
 	};
 };
-- 
2.27.0

[PATCH v2 4/9] ARM: mstar: Adjust IMI size of infinity

[Daniel Palmer]

infinity has 88KB of SRAM at the IMI region.

Signed-off-by: Daniel Palmer <daniel@0x0f.com>
---
 arch/arm/boot/dts/infinity.dtsi | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/arch/arm/boot/dts/infinity.dtsi b/arch/arm/boot/dts/infinity.dtsi
index f68e6d59c328..cd911adef014 100644
--- a/arch/arm/boot/dts/infinity.dtsi
+++ b/arch/arm/boot/dts/infinity.dtsi
@@ -5,3 +5,7 @@
  */
 
 #include "mstar-v7.dtsi"
+
+&imi {
+	reg = <0xa0000000 0x16000>;
+};
-- 
2.27.0

[PATCH v2 5/9] ARM: mstar: Adjust IMI size for mercury5

[Daniel Palmer]

mercury5 family chips have 128KB of SRAM in the IMI region.

Signed-off-by: Daniel Palmer <daniel@0x0f.com>
---
 arch/arm/boot/dts/mercury5.dtsi | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/arch/arm/boot/dts/mercury5.dtsi b/arch/arm/boot/dts/mercury5.dtsi
index f68e6d59c328..a7d0dd9d6132 100644
--- a/arch/arm/boot/dts/mercury5.dtsi
+++ b/arch/arm/boot/dts/mercury5.dtsi
@@ -5,3 +5,7 @@
  */
 
 #include "mstar-v7.dtsi"
+
+&imi {
+	reg = <0xa0000000 0x20000>;
+};
-- 
2.27.0

[PATCH v2 6/9] ARM: mstar: Adjust IMI size for infinity3

[Daniel Palmer]

infinity3 has 128KB of SRAM at the IMI region.

Signed-off-by: Daniel Palmer <daniel@0x0f.com>
---
 arch/arm/boot/dts/infinity3.dtsi | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/arch/arm/boot/dts/infinity3.dtsi b/arch/arm/boot/dts/infinity3.dtsi
index 2830d064c07d..9b918c802654 100644
--- a/arch/arm/boot/dts/infinity3.dtsi
+++ b/arch/arm/boot/dts/infinity3.dtsi
@@ -5,3 +5,7 @@
  */
 
 #include "infinity.dtsi"
+
+&imi {
+	reg = <0xa0000000 0x20000>;
+};
-- 
2.27.0

[PATCH v2 7/9] ARM: mstar: Add PMU

[Daniel Palmer]

Adds the ARM PMU to the base MStar v7 dtsi.

Signed-off-by: Daniel Palmer <daniel@0x0f.com>
---
 arch/arm/boot/dts/mstar-v7.dtsi | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/arch/arm/boot/dts/mstar-v7.dtsi b/arch/arm/boot/dts/mstar-v7.dtsi
index 1941f88a69a5..f787b8e4b67f 100644
--- a/arch/arm/boot/dts/mstar-v7.dtsi
+++ b/arch/arm/boot/dts/mstar-v7.dtsi
@@ -40,6 +40,12 @@ arch_timer {
 		clock-frequency = <6000000>;
 	};
 
+	pmu: pmu {
+		compatible = "arm,cortex-a7-pmu";
+		interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-affinity = <&cpu0>;
+	};
+
 	soc: soc {
 		compatible = "simple-bus";
 		#address-cells = <1>;
-- 
2.27.0

[PATCH v2 8/9] ARM: mstar: Add "pmsleep" node to base dtsi

[Daniel Palmer]

This patch adds a node for the pmsleep area so that other
drivers can access registers contained within it.

Signed-off-by: Daniel Palmer <daniel@0x0f.com>
---
 arch/arm/boot/dts/mstar-v7.dtsi | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/arch/arm/boot/dts/mstar-v7.dtsi b/arch/arm/boot/dts/mstar-v7.dtsi
index f787b8e4b67f..bb7fb3e689a7 100644
--- a/arch/arm/boot/dts/mstar-v7.dtsi
+++ b/arch/arm/boot/dts/mstar-v7.dtsi
@@ -73,6 +73,11 @@ riu: bus@1f000000 {
 			#size-cells = <1>;
 			ranges = <0x0 0x1f000000 0x00400000>;
 
+			pmsleep: syscon@1c00 {
+				compatible = "mstar,pmsleep", "syscon";
+				reg = <0x1c00 0x100>;
+			};
+
 			l3bridge: l3bridge@204400 {
 				compatible = "mstar,l3bridge";
 				reg = <0x204400 0x200>;
-- 
2.27.0

[PATCH v2 9/9] ARM: mstar: Add reboot support

[Daniel Palmer]

MStar v7 SoCs support reset by writing a magic value to a register
in the "pmsleep" area.

This adds a node for using the syscon reboot driver to trigger a reset.

Signed-off-by: Daniel Palmer <daniel@0x0f.com>
---
 arch/arm/boot/dts/mstar-v7.dtsi | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/arch/arm/boot/dts/mstar-v7.dtsi b/arch/arm/boot/dts/mstar-v7.dtsi
index bb7fb3e689a7..c7458c67c4df 100644
--- a/arch/arm/boot/dts/mstar-v7.dtsi
+++ b/arch/arm/boot/dts/mstar-v7.dtsi
@@ -78,6 +78,13 @@ pmsleep: syscon@1c00 {
 				reg = <0x1c00 0x100>;
 			};
 
+			reboot {
+				compatible = "syscon-reboot";
+				regmap = <&pmsleep>;
+				offset = <0xb8>;
+				mask = <0x79>;
+			};
+
 			l3bridge: l3bridge@204400 {
 				compatible = "mstar,l3bridge";
 				reg = <0x204400 0x200>;
-- 
2.27.0

Re: [PATCH v2 1/9] dt-bindings: arm: mstar: Add binding details for mstar, pmsleep

[Rob Herring]

On Tue, 28 Jul 2020 19:03:13 +0900, Daniel Palmer wrote:
> This adds a YAML description of the pmsleep node used by
> MStar/SigmaStar Armv7 SoCs.
> 
> Signed-off-by: Daniel Palmer <daniel@0x0f.com>
> ---
>  .../bindings/arm/mstar/mstar,pmsleep.yaml     | 43 +++++++++++++++++++
>  MAINTAINERS                                   |  1 +
>  2 files changed, 44 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/arm/mstar/mstar,pmsleep.yaml
> 


My bot found errors running 'make dt_binding_check' on your patch:

Error: Documentation/devicetree/bindings/arm/mstar/mstar,pmsleep.example.dts:21.23-24 syntax error
FATAL ERROR: Unable to parse input tree
scripts/Makefile.lib:315: recipe for target 'Documentation/devicetree/bindings/arm/mstar/mstar,pmsleep.example.dt.yaml' failed
make[1]: *** [Documentation/devicetree/bindings/arm/mstar/mstar,pmsleep.example.dt.yaml] Error 1
make[1]: *** Waiting for unfinished jobs....
Makefile:1347: recipe for target 'dt_binding_check' failed
make: *** [dt_binding_check] Error 2


See https://patchwork.ozlabs.org/patch/1337730

If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure dt-schema is up to date:

pip3 install git+https://github.com/devicetree-org/dt-schema.git@master --upgrade

Please check and re-submit.

Re: [PATCH v2 1/9] dt-bindings: arm: mstar: Add binding details for mstar,pmsleep

[Rob Herring]

On Tue, Jul 28, 2020 at 07:03:13PM +0900, Daniel Palmer wrote:
> This adds a YAML description of the pmsleep node used by
> MStar/SigmaStar Armv7 SoCs.
> 
> Signed-off-by: Daniel Palmer <daniel@0x0f.com>
> ---
>  .../bindings/arm/mstar/mstar,pmsleep.yaml     | 43 +++++++++++++++++++
>  MAINTAINERS                                   |  1 +
>  2 files changed, 44 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/arm/mstar/mstar,pmsleep.yaml
> 
> diff --git a/Documentation/devicetree/bindings/arm/mstar/mstar,pmsleep.yaml b/Documentation/devicetree/bindings/arm/mstar/mstar,pmsleep.yaml
> new file mode 100644
> index 000000000000..ef78097a7087
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/arm/mstar/mstar,pmsleep.yaml
> @@ -0,0 +1,43 @@
> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> +# Copyright 2020 thingy.jp.
> +%YAML 1.2
> +---
> +$id: "http://devicetree.org/schemas/arm/mstar/mstar,pmsleep.yaml#"
> +$schema: "http://devicetree.org/meta-schemas/core.yaml#"
> +
> +title: MStar/SigmaStar Armv7 SoC pmsleep register region
> +
> +maintainers:
> +  - Daniel Palmer <daniel@thingy.jp>
> +
> +description: |
> +  MStar/Sigmastar's Armv7 SoCs contain a region of registers that are
> +  in the always on domain that the vendor code calls the "pmsleep" area.
> +
> +  This area contains registers and bits for a broad range of functionality
> +  ranging from registers that control going into deep sleep to bits that
> +  turn things like the internal temperature sensor on and off.
> +
> +properties:
> +  compatible:
> +    oneOf:
> +      - items:
> +         - enum:
> +             - mstar,pmsleep

Needs to be SoC specific. Random collections of bits are never 
'standard' from one SoC to the next.

If your never going to have child nodes, then you can just add the 
compatible to syscon.yaml.

> +         - const: syscon
> +
> +  reg:
> +    maxItems: 1
> +
> +required:
> +  - compatible
> +  - reg
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +    pmsleep: pmsleep@1c00 {
> +        compatible = "mstar,pmsleep", "syscon";
> +        reg = <0x0x1c00 0x100>;
> +    };
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 991814ea6f76..432fcc867ed6 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -2140,6 +2140,7 @@ L:	linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
>  S:	Maintained
>  W:	http://linux-chenxing.org/
>  F:	Documentation/devicetree/bindings/arm/mstar.yaml
> +F:	Documentation/devicetree/bindings/arm/mstar/*
>  F:	arch/arm/boot/dts/infinity*.dtsi
>  F:	arch/arm/boot/dts/mercury*.dtsi
>  F:	arch/arm/boot/dts/mstar-v7.dtsi
> -- 
> 2.27.0
> 

Re: [PATCH v2 1/9] dt-bindings: arm: mstar: Add binding details for mstar,pmsleep

[Daniel Palmer]

Hi Rob,

On Wed, 29 Jul 2020 at 04:18, Rob Herring <robh@kernel.org> wrote:

> > +properties:
> > +  compatible:
> > +    oneOf:
> > +      - items:
> > +         - enum:
> > +             - mstar,pmsleep
>
> Needs to be SoC specific. Random collections of bits are never
> 'standard' from one SoC to the next.

I don't have a manual for any of the chips so I can't say for sure but
so far all of the chips in this group (ARMv7 based MStar/Sigmastar)
has the same layout for the registers i.e. the reset register,
the resume address registers are at the same place for all of them.

Does calling it "mstar,pmsleepv7" make more sense? I'm not sure what
to call it really.

> If your never going to have child nodes, then you can just add the
> compatible to syscon.yaml.

Considering the above would it make sense to drop the specific
compatible string for now and just leave it as syscon until there is a reason
to make it more specific?

Thanks,

Daniel

Re: [PATCH v2 1/9] dt-bindings: arm: mstar: Add binding details for mstar,pmsleep

[Arnd Bergmann]

On Wed, Jul 29, 2020 at 11:14 AM Daniel Palmer <daniel@0x0f.com> wrote:
> On Wed, 29 Jul 2020 at 04:18, Rob Herring <robh@kernel.org> wrote:
>
> > > +properties:
> > > +  compatible:
> > > +    oneOf:
> > > +      - items:
> > > +         - enum:
> > > +             - mstar,pmsleep
> >
> > Needs to be SoC specific. Random collections of bits are never
> > 'standard' from one SoC to the next.
>
> I don't have a manual for any of the chips so I can't say for sure but
> so far all of the chips in this group (ARMv7 based MStar/Sigmastar)
> has the same layout for the registers i.e. the reset register,
> the resume address registers are at the same place for all of them.
>
> Does calling it "mstar,pmsleepv7" make more sense? I'm not sure what
> to call it really.

Use the name of the oldest chip you know that supports it in there,
such as "mstar,msc313-pmsleep" if this one is specific to msc313.

       Arnd

Re: [PATCH v2 1/9] dt-bindings: arm: mstar: Add binding details for mstar,pmsleep

[Daniel Palmer]

Hi Arnd,

On Wed, 29 Jul 2020 at 21:14, Arnd Bergmann <arnd@arndb.de> wrote:
> > Does calling it "mstar,pmsleepv7" make more sense? I'm not sure what
> > to call it really.
>
> Use the name of the oldest chip you know that supports it in there,
> such as "mstar,msc313-pmsleep" if this one is specific to msc313.

That makes sense. I think the original patch got merged to soc/arm/newsoc.
Should I recreate the series or create a new patch to do the corrections?

Slightly off topic but I'm working on the series for the interrupt controller
and I've just renamed it from mstar,msc313e-intc to mstar,v7intc.
I originally called it msc313e because I only knew of that chip but the
same controller is present at the same place in all of the chips so far.
I guess I should probably rename it to mstar,msc313-intc to keep with
the first chip it appeared in pattern?

Thanks,

Daniel

Re: [PATCH v2 1/9] dt-bindings: arm: mstar: Add binding details for mstar,pmsleep

[Arnd Bergmann]

On Wed, Jul 29, 2020 at 2:34 PM Daniel Palmer <daniel@0x0f.com> wrote:
>
> On Wed, 29 Jul 2020 at 21:14, Arnd Bergmann <arnd@arndb.de> wrote:
> > > Does calling it "mstar,pmsleepv7" make more sense? I'm not sure what
> > > to call it really.
> >
> > Use the name of the oldest chip you know that supports it in there,
> > such as "mstar,msc313-pmsleep" if this one is specific to msc313.
>
> That makes sense. I think the original patch got merged to soc/arm/newsoc.
> Should I recreate the series or create a new patch to do the corrections?

Please send an incremental patch.

> Slightly off topic but I'm working on the series for the interrupt controller
> and I've just renamed it from mstar,msc313e-intc to mstar,v7intc.
> I originally called it msc313e because I only knew of that chip but the
> same controller is present at the same place in all of the chips so far.
> I guess I should probably rename it to mstar,msc313-intc to keep with
> the first chip it appeared in pattern?

Yes, correct. If you have multiple chips using this controller, use the
name of the oldest chip as the generic identifier and then add a more
specific one for each the later chips that also use it, so the driver is
able to tell the difference if it ever needs to, something like:

(on msc313)
compatible = "mstar,msc313-intc";

(on msc314)
compatible = "mstar,msc314-intc", "mstar,msc313-intc";

(on msc315)
compatible = "mstar,msc315-intc", "mstar,msc313-intc";

   Arnd