From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.0 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B08FCC433E1 for ; Wed, 29 Jul 2020 12:26:12 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 9BA862070B for ; Wed, 29 Jul 2020 12:26:12 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726497AbgG2M0K (ORCPT ); Wed, 29 Jul 2020 08:26:10 -0400 Received: from relmlor2.renesas.com ([210.160.252.172]:43345 "EHLO relmlie6.idc.renesas.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1726054AbgG2M0K (ORCPT ); Wed, 29 Jul 2020 08:26:10 -0400 X-IronPort-AV: E=Sophos;i="5.75,410,1589209200"; d="scan'208";a="53141138" Received: from unknown (HELO relmlir5.idc.renesas.com) ([10.200.68.151]) by relmlie6.idc.renesas.com with ESMTP; 29 Jul 2020 21:26:08 +0900 Received: from localhost.localdomain (unknown [172.29.53.182]) by relmlir5.idc.renesas.com (Postfix) with ESMTP id 392F84004BDA; Wed, 29 Jul 2020 21:26:06 +0900 (JST) From: Biju Das To: Rob Herring Cc: Biju Das , Geert Uytterhoeven , Magnus Damm , linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, Chris Paterson , Biju Das , Prabhakar Mahadev Lad Subject: [PATCH] ARM: dts: iwg22d-sodimm: Fix dt nodes sorting Date: Wed, 29 Jul 2020 13:26:02 +0100 Message-Id: <20200729122602.9561-1-biju.das.jz@bp.renesas.com> X-Mailer: git-send-email 2.17.1 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Some device nodes in the r8a7745-iwg22d-sodimm.dts are not sorted alphabetically. This patch fixes the sorting of nodes and also fixes a typo in the stmpe node. Signed-off-by: Biju Das --- This patch is tested against renesas-devel --- arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts | 104 ++++++++++---------- 1 file changed, 52 insertions(+), 52 deletions(-) diff --git a/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts b/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts index b15b1b088a32..5f7f230de529 100644 --- a/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts +++ b/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts @@ -53,6 +53,25 @@ clock-frequency = <26000000>; }; + backlight_lcd: backlight { + compatible = "pwm-backlight"; + pwms = <&tpu 3 5000000 PWM_POLARITY_INVERTED>; + brightness-levels = <0 4 8 16 32 64 128 255>; + default-brightness-level = <7>; + }; + + lcd_panel: lcd { + compatible = "edt,etm043080dh6gp"; + power-supply = <&vccq_panel>; + backlight = <&backlight_lcd>; + + port { + lcd_in: endpoint { + remote-endpoint = <&du_out_rgb0>; + }; + }; + }; + rsnd_sgtl5000: sound { compatible = "simple-audio-card"; simple-audio-card,format = "i2s"; @@ -68,18 +87,6 @@ }; }; - vccq_sdhi0: regulator-vccq-sdhi0 { - compatible = "regulator-gpio"; - - regulator-name = "SDHI0 VccQ"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - - gpios = <&gpio0 20 GPIO_ACTIVE_LOW>; - gpios-states = <1>; - states = <3300000 1>, <1800000 0>; - }; - vccq_panel: regulator-vccq-panel { compatible = "regulator-fixed"; regulator-name = "Panel VccQ"; @@ -89,38 +96,16 @@ enable-active-high; }; - backlight_lcd: backlight { - compatible = "pwm-backlight"; - pwms = <&tpu 3 5000000 PWM_POLARITY_INVERTED>; - brightness-levels = <0 4 8 16 32 64 128 255>; - default-brightness-level = <7>; - }; - - lcd_panel: lcd { - compatible = "edt,etm043080dh6gp"; - power-supply = <&vccq_panel>; - backlight = <&backlight_lcd>; - - port { - lcd_in: endpoint { - remote-endpoint = <&du_out_rgb0>; - }; - }; - }; -}; - -&du { - pinctrl-0 = <&du0_pins>; - pinctrl-names = "default"; + vccq_sdhi0: regulator-vccq-sdhi0 { + compatible = "regulator-gpio"; - status = "okay"; + regulator-name = "SDHI0 VccQ"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; - ports { - port@0 { - endpoint { - remote-endpoint = <&lcd_in>; - }; - }; + gpios = <&gpio0 20 GPIO_ACTIVE_LOW>; + gpios-states = <1>; + states = <3300000 1>, <1800000 0>; }; }; @@ -150,6 +135,21 @@ status = "okay"; }; +&du { + pinctrl-0 = <&du0_pins>; + pinctrl-names = "default"; + + status = "okay"; + + ports { + port@0 { + endpoint { + remote-endpoint = <&lcd_in>; + }; + }; + }; +}; + &hscif1 { pinctrl-0 = <&hscif1_pins>; pinctrl-names = "default"; @@ -171,6 +171,15 @@ status = "okay"; clock-frequency = <400000>; + sgtl5000: codec@a { + compatible = "fsl,sgtl5000"; + #sound-dai-cells = <0>; + reg = <0x0a>; + clocks = <&audio_clock>; + VDDA-supply = <®_3p3v>; + VDDIO-supply = <®_3p3v>; + }; + stmpe811@44 { compatible = "st,stmpe811"; reg = <0x44>; @@ -179,7 +188,7 @@ /* 3.25 MHz ADC clock speed */ st,adc-freq = <1>; - /* ADC converstion time: 80 clocks */ + /* ADC conversion time: 80 clocks */ st,sample-time = <4>; /* 12-bit ADC */ st,mod-12b = <1>; @@ -203,15 +212,6 @@ st,touch-det-delay = <5>; }; }; - - sgtl5000: codec@a { - compatible = "fsl,sgtl5000"; - #sound-dai-cells = <0>; - reg = <0x0a>; - clocks = <&audio_clock>; - VDDA-supply = <®_3p3v>; - VDDIO-supply = <®_3p3v>; - }; }; &pci1 { -- 2.17.1