From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-10.1 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH, MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6EAF0C433E0 for ; Sat, 8 Aug 2020 21:15:32 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 47C37206CD for ; Sat, 8 Aug 2020 21:15:32 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=ideasonboard.com header.i=@ideasonboard.com header.b="hTMGclAh" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726212AbgHHVPb (ORCPT ); Sat, 8 Aug 2020 17:15:31 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45440 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726200AbgHHVPb (ORCPT ); Sat, 8 Aug 2020 17:15:31 -0400 Received: from perceval.ideasonboard.com (perceval.ideasonboard.com [IPv6:2001:4b98:dc2:55:216:3eff:fef7:d647]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B5E6AC061756; Sat, 8 Aug 2020 14:15:30 -0700 (PDT) Received: from pendragon.ideasonboard.com (85-76-78-184-nat.elisa-mobile.fi [85.76.78.184]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id 7738EF9; Sat, 8 Aug 2020 23:15:18 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1596921319; bh=gP1x91RB3kKPu6RAsnMxKRWAVEXmSF8Ya/Nk5KxpoS0=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=hTMGclAhq9aNVblQoZg5nUyNjfDR/HzA7mYscGl0E+dJZw8J8qAIS4GosPTycCcn6 YWsxMq4tpwb+f7f59cGmGYBPgFaIsTTZiawy/94smWZpNZstUc8/Yon+n8oGrrJMET mbIwwQRF83Vm/IZhE0askrO/V4yfbRlHd0DXpAug= Date: Sun, 9 Aug 2020 00:15:03 +0300 From: Laurent Pinchart To: Lad Prabhakar Cc: Geert Uytterhoeven , Kieran Bingham , David Airlie , Rob Herring , Magnus Damm , Daniel Vetter , dri-devel@lists.freedesktop.org, linux-renesas-soc@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Prabhakar Subject: Re: [PATCH 5/7] ARM: dts: r8a7742: Add DU support Message-ID: <20200808211503.GS6186@pendragon.ideasonboard.com> References: <20200807174954.14448-1-prabhakar.mahadev-lad.rj@bp.renesas.com> <20200807174954.14448-6-prabhakar.mahadev-lad.rj@bp.renesas.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: <20200807174954.14448-6-prabhakar.mahadev-lad.rj@bp.renesas.com> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Hi Prabhakar, Thank you for the patch. On Fri, Aug 07, 2020 at 06:49:52PM +0100, Lad Prabhakar wrote: > Add du node to r8a7742 SoC DT. Boards that want to enable the DU > need to specify the output topology. > > Signed-off-by: Lad Prabhakar > Reviewed-by: Marian-Cristian Rotariu Reviewed-by: Laurent Pinchart > --- > arch/arm/boot/dts/r8a7742.dtsi | 35 ++++++++++++++++++++++++++++++++++ > 1 file changed, 35 insertions(+) > > diff --git a/arch/arm/boot/dts/r8a7742.dtsi b/arch/arm/boot/dts/r8a7742.dtsi > index 4a8d27dff9f7..a979a4b3de61 100644 > --- a/arch/arm/boot/dts/r8a7742.dtsi > +++ b/arch/arm/boot/dts/r8a7742.dtsi > @@ -1509,6 +1509,41 @@ > resets = <&cpg 408>; > }; > > + du: display@feb00000 { > + compatible = "renesas,du-r8a7742"; > + reg = <0 0xfeb00000 0 0x70000>; > + interrupts = , > + , > + ; > + clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>, > + <&cpg CPG_MOD 722>; > + clock-names = "du.0", "du.1", "du.2"; > + resets = <&cpg 724>; > + reset-names = "du.0"; > + status = "disabled"; > + > + ports { > + #address-cells = <1>; > + #size-cells = <0>; > + > + port@0 { > + reg = <0>; > + du_out_rgb: endpoint { > + }; > + }; > + port@1 { > + reg = <1>; > + du_out_lvds0: endpoint { > + }; > + }; > + port@2 { > + reg = <2>; > + du_out_lvds1: endpoint { > + }; > + }; > + }; > + }; > + > prr: chipid@ff000044 { > compatible = "renesas,prr"; > reg = <0 0xff000044 0 4>; -- Regards, Laurent Pinchart