From: Icenowy Zheng <icenowy@aosc.io>
To: Rob Herring <robh+dt@kernel.org>,
Maxime Ripard <mripard@kernel.org>, Chen-Yu Tsai <wens@csie.org>
Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-sunxi@googlegroups.com,
Icenowy Zheng <icenowy@aosc.io>
Subject: [PATCH 4/7] ARM: dts: sun8i: V3/V3s/S3/S3L: add pinctrl for 8-bit parallel CSI
Date: Wed, 23 Sep 2020 09:00:11 +0800 [thread overview]
Message-ID: <20200923010014.148482-1-icenowy@aosc.io> (raw)
In-Reply-To: <20200923005709.147966-1-icenowy@aosc.io>
The CSI1 controller of V3/V3s/S3/S3L SoCs is used for parallel CSI.
As we're going to add support for Pine64 SCC board, which uses 8-bit
parallel CSI (and the MCLK output), add the pinctrl node of 8-bit
CSI and MCLK to the DTSI file.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
---
arch/arm/boot/dts/sun8i-v3s.dtsi | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-v3s.dtsi b/arch/arm/boot/dts/sun8i-v3s.dtsi
index 3e079973672d..19fba1a9115b 100644
--- a/arch/arm/boot/dts/sun8i-v3s.dtsi
+++ b/arch/arm/boot/dts/sun8i-v3s.dtsi
@@ -312,6 +312,20 @@ pio: pinctrl@1c20800 {
interrupt-controller;
#interrupt-cells = <3>;
+ /omit-if-no-ref/
+ csi1_8bit_pins: csi1-8bit-pins {
+ pins = "PE0", "PE2", "PE3", "PE8", "PE9",
+ "PE10", "PE11", "PE12", "PE13", "PE14",
+ "PE15";
+ function = "csi";
+ };
+
+ /omit-if-no-ref/
+ csi1_mclk_pin: csi1-mclk-pin {
+ pins = "PE1";
+ function = "csi";
+ };
+
i2c0_pins: i2c0-pins {
pins = "PB6", "PB7";
function = "i2c0";
--
2.27.0
next prev parent reply other threads:[~2020-09-23 1:08 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-09-23 0:57 [PATCH 0/7] Pine64 PineCube support Icenowy Zheng
2020-09-23 0:57 ` [PATCH 1/7] ARM: dts: sun8i: V3/V3s/S3/S3L: add Ethernet support Icenowy Zheng
2020-09-23 0:58 ` [PATCH 2/7] ARM: dts: sun8i: V3/V3s/S3/S3L: add pinctrl for UART2 RX/TX Icenowy Zheng
2020-09-23 0:58 ` [PATCH 3/7] ARM: dts: sun8i: V3/V3s/S3/S3L: add CSI1 device node Icenowy Zheng
2020-09-23 1:00 ` Icenowy Zheng [this message]
2020-09-23 1:00 ` [PATCH 5/7] ARM: dts: sun8i: V3/V3s/S3/S3L: add pinctrl for I2C1 at PE bank Icenowy Zheng
2020-09-23 1:01 ` [PATCH 4/7] ARM: dts: sun8i: V3/V3s/S3/S3L: add pinctrl for 8-bit parallel CSI Icenowy Zheng
2020-09-23 1:02 ` [PATCH 6/7] dt-bindings: arm: sunxi: add Pine64 PineCube binding Icenowy Zheng
2020-09-23 1:02 ` [PATCH 7/7] ARM: dts: sun8i: s3l: add support for Pine64 PineCube IP camera Icenowy Zheng
2020-09-25 15:12 ` [PATCH 0/7] Pine64 PineCube support Maxime Ripard
2020-10-03 10:28 ` [linux-sunxi] " Clément Péron
2020-10-03 10:31 ` Clément Péron
2020-10-03 10:39 ` Icenowy Zheng
2020-10-03 13:37 ` Clément Péron
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20200923010014.148482-1-icenowy@aosc.io \
--to=icenowy@aosc.io \
--cc=devicetree@vger.kernel.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-sunxi@googlegroups.com \
--cc=mripard@kernel.org \
--cc=robh+dt@kernel.org \
--cc=wens@csie.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).