From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 62BD3C2D0A3 for ; Wed, 4 Nov 2020 13:11:15 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 191452072C for ; Wed, 4 Nov 2020 13:11:15 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729484AbgKDNLO (ORCPT ); Wed, 4 Nov 2020 08:11:14 -0500 Received: from vps0.lunn.ch ([185.16.172.187]:34618 "EHLO vps0.lunn.ch" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726350AbgKDNLN (ORCPT ); Wed, 4 Nov 2020 08:11:13 -0500 Received: from andrew by vps0.lunn.ch with local (Exim 4.94) (envelope-from ) id 1kaIZ6-005CpL-Au; Wed, 04 Nov 2020 14:11:04 +0100 Date: Wed, 4 Nov 2020 14:11:04 +0100 From: Andrew Lunn To: "Badel, Laurent" Cc: Marco Felsch , "davem@davemloft.net" , "fugang.duan@nxp.com" , "kuba@kernel.org" , Heiner Kallweit , "linux@armlinux.org.uk" , "p.zabel@pengutronix.de" , "lgirdwood@gmail.com" , "broonie@kernel.org" , "robh+dt@kernel.org" , "richard.leitner@skidata.com" , "netdev@vger.kernel.org" , "devicetree@vger.kernel.org" , "f.fainelli@gmail.com" , "Quette, Arnaud" Subject: Re: [EXTERNAL] Re: [PATCH net 0/4] Restore and fix PHY reset for SMSC LAN8720 Message-ID: <20201104131104.GV933237@lunn.ch> References: <20201029081626.wtnhctobwvlhmfan@pengutronix.de> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org > > > (ii) This defeats the purpose of a previous commit [2] that disabled > > > the ref clock for power saving reasons. If a ref clock for the PHY is > > > specified in DT, the SMSC driver will keep it always on (confirmed > > > with scope). > > > > NACK, the clock provider can be any clock. This has nothing to do with the > > FEC clocks. The FEC _can_ be used as clock provider. > > I'm sure you understand this much better than I do. What I can say is that I > directly measured the ref clk and found that when I add the clock to the DT > the clock stays on forever. Basically it seems like the FEC calls to > clk_disable_unprepare() don't work in this case, though I'm not sure about the > reason behind this. The reason is easy to explain. The clock API is reference counted. It counts how many times a clock is turned on and off. A clock has to be turned off as many times as it was turned on before the hardware actually turns off. So you have the FEC turning the clock on during probe, followed by the phy turning the clock on. Some time later the FEC turns the clock off for run time power saving, but there is still one reference to the clock held by the PHY, so the hardware is left ticking. Andrew