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From: sven.auhagen@voleatech.de
To: axboe@kernel.dk, hdegoede@redhat.com, robh+dt@kernel.org,
	tglx@linutronix.de, maz@kernel.org, gregory.clement@bootlin.com
Cc: linux-ide@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	devicetree@vger.kernel.org, jason@lakedaemon.net, andrew@lunn.ch,
	rjw@rjwysocki.net, viresh.kumar@linaro.org,
	antoine.tenart@bootlin.com, maxime.chevallier@bootlin.com,
	thomas.petazzoni@bootlin.com, miquel.raynal@bootlin.com
Subject: [PATCH v2 9/9] arm64: dts: marvell: armada-cp110: Switch to per-port SATA interrupts
Date: Wed,  4 Nov 2020 16:52:37 +0100	[thread overview]
Message-ID: <20201104155237.77772-10-sven.auhagen@voleatech.de> (raw)
In-Reply-To: <20201104155237.77772-1-sven.auhagen@voleatech.de>

From: Sven Auhagen <sven.auhagen@voleatech.de>

There are two SATA ports per CP110. Each of them has a dedicated
interrupt. Describe the real hardware by adding two SATA ports to the
CP110 SATA node.

Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Sven Auhagen <sven.auhagen@voleatech.de>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
 arch/arm64/boot/dts/marvell/armada-cp11x.dtsi | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/arch/arm64/boot/dts/marvell/armada-cp11x.dtsi b/arch/arm64/boot/dts/marvell/armada-cp11x.dtsi
index 9dcf16beabf5..ec27294f097b 100644
--- a/arch/arm64/boot/dts/marvell/armada-cp11x.dtsi
+++ b/arch/arm64/boot/dts/marvell/armada-cp11x.dtsi
@@ -300,11 +300,9 @@
 		};
 
 		CP11X_LABEL(sata0): sata@540000 {
-			compatible = "marvell,armada-8k-ahci",
-			"generic-ahci";
+			compatible = "marvell,armada-8k-ahci";
 			reg = <0x540000 0x30000>;
 			dma-coherent;
-			interrupts = <107 IRQ_TYPE_LEVEL_HIGH>;
 			clocks = <&CP11X_LABEL(clk) 1 15>,
 				 <&CP11X_LABEL(clk) 1 16>;
 			#address-cells = <1>;
@@ -312,10 +310,12 @@
 			status = "disabled";
 
 			sata-port@0 {
+				interrupts = <109 IRQ_TYPE_LEVEL_HIGH>;
 				reg = <0>;
 			};
 
 			sata-port@1 {
+				interrupts = <107 IRQ_TYPE_LEVEL_HIGH>;
 				reg = <1>;
 			};
 		};
-- 
2.20.1


      parent reply	other threads:[~2020-11-04 15:55 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-11-04 15:52 [PATCH v2 0/9] Armada8k enable per-port SATA interrupts and drop a hack in the IRQ subsystem sven.auhagen
2020-11-04 15:52 ` [PATCH v2 1/9] ata: ahci: mvebu: Rename a platform data flag sven.auhagen
2020-11-04 15:52 ` [PATCH v2 2/9] ata: ahci: mvebu: Support A8k compatible sven.auhagen
2020-11-04 15:52 ` [PATCH v2 3/9] ata: ahci: custom irq init for host init sven.auhagen
2020-11-09 14:00   ` Hans de Goede
2020-11-09 17:25     ` Sven Auhagen
2020-11-04 15:52 ` [PATCH v2 4/9] ata: ahci: add ack callback to multi irq handler sven.auhagen
2020-11-09 13:59   ` Hans de Goede
2020-11-04 15:52 ` [PATCH v2 5/9] ata: ahci: mvebu: Add support for A8k legacy DT bindings sven.auhagen
2020-11-09 13:59   ` Hans de Goede
2020-11-04 15:52 ` [PATCH v2 6/9] irqchip/irq-mvebu-icu: Remove the double SATA ports interrupt hack sven.auhagen
2020-11-04 15:52 ` [PATCH v2 7/9] dt-bindings: ata: Update ahci bindings with possible per-port interrupts sven.auhagen
2020-11-04 15:52 ` [PATCH v2 8/9] dt-bindings: ata: Update ahci_mvebu bindings sven.auhagen
2020-11-04 15:52 ` sven.auhagen [this message]

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