From: Thierry Reding <thierry.reding@gmail.com>
To: Marc Zyngier <maz@kernel.org>
Cc: devicetree@vger.kernel.org, linux-tegra@vger.kernel.org,
linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
Jonathan Hunter <jonathanh@nvidia.com>,
Nagarjuna Kristam <nkristam@nvidia.com>,
Sowjanya Komatineni <skomatineni@nvidia.com>,
kernel-team@android.com
Subject: Re: [PATCH] arm64: tegra: Fix GIC400 missing GICH/GICV register regions
Date: Tue, 10 Nov 2020 18:39:11 +0100 [thread overview]
Message-ID: <20201110173911.GC2297135@ulmo> (raw)
In-Reply-To: <20201005133256.1390543-1-maz@kernel.org>
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On Mon, Oct 05, 2020 at 02:32:56PM +0100, Marc Zyngier wrote:
> GIC400 has full support for virtualization, and yet the tegra186
> DT doesn't expose the GICH/GICV regions (despite exposing the
> maintenance interrupt that only makes sense for virtualization).
>
> Add the missing regions, based on the hunch that the HW doesn't
> use the CPU build-in interfaces, but instead the external ones
> provided by the GIC. KVM's virtual GIC now works with this change.
>
> Signed-off-by: Marc Zyngier <maz@kernel.org>
> ---
> arch/arm64/boot/dts/nvidia/tegra186.dtsi | 4 +++-
> 1 file changed, 3 insertions(+), 1 deletion(-)
Applied, thanks.
Thierry
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prev parent reply other threads:[~2020-11-10 17:39 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-10-05 13:32 [PATCH] arm64: tegra: Fix GIC400 missing GICH/GICV register regions Marc Zyngier
2020-11-10 17:39 ` Thierry Reding [this message]
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