From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id EBE1BC56202 for ; Tue, 17 Nov 2020 16:20:04 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 9C75E208CA for ; Tue, 17 Nov 2020 16:20:04 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="TJuKbf0I" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726854AbgKQQUB (ORCPT ); Tue, 17 Nov 2020 11:20:01 -0500 Received: from fllv0016.ext.ti.com ([198.47.19.142]:50608 "EHLO fllv0016.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726379AbgKQQUA (ORCPT ); Tue, 17 Nov 2020 11:20:00 -0500 Received: from lelv0265.itg.ti.com ([10.180.67.224]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 0AHGJl5P106024; Tue, 17 Nov 2020 10:19:47 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1605629987; bh=kg41fzr6IfLFG85hwpt903XW2gFVaU++Z+vl0ZxbKSo=; h=From:To:CC:Subject:Date; b=TJuKbf0IzzH9zDaFn2SpZ9cB3npN4Uve/9gfuHuFb56fas+WE/VVAKRpdN5h8Gipe 02/JjA40AiBGcMLBWyYJ9aapSYR4dRobUG+UfcqJOnrlsNa6HIr89UApBTnFF5kavD 4JvcRb8GphyO6lBHxxUZGVNCq6yPLoRE1nkPwQy0= Received: from DLEE111.ent.ti.com (dlee111.ent.ti.com [157.170.170.22]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 0AHGJlLA098410 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 17 Nov 2020 10:19:47 -0600 Received: from DLEE112.ent.ti.com (157.170.170.23) by DLEE111.ent.ti.com (157.170.170.22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3; Tue, 17 Nov 2020 10:19:46 -0600 Received: from lelv0327.itg.ti.com (10.180.67.183) by DLEE112.ent.ti.com (157.170.170.23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3 via Frontend Transport; Tue, 17 Nov 2020 10:19:46 -0600 Received: from pxplinux063.india.englab.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 0AHGJhwG032251; Tue, 17 Nov 2020 10:19:43 -0600 From: Sekhar Nori To: Nishanth Menon , Tero Kristo CC: Linux ARM Mailing List , Device Tree Mailing List , , Rob Herring , Faiz Abbas , Grygorii Strashko , Lokesh Vutla , Andre Przywara Subject: [PATCH v2 0/4] arm64: dts: ti: J7200 GPIO support and warning fixes Date: Tue, 17 Nov 2020 21:49:38 +0530 Message-ID: <20201117161942.38754-1-nsekhar@ti.com> X-Mailer: git-send-email 2.17.1 MIME-Version: 1.0 Content-Type: text/plain X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org These patches add gpio support for TI's J7200 platform. The first two patches fix existing warnings in preparation for adding GPIO support. Changes in v2: - Add patches fixing existing warnings so GPIO support does not end up adding more warnings - Addressed Nishanth's comments on GPIO patches - merge patches adding main and wakeup domain GPIOs into single patch - fix commit description going over 75 chars - fix W=2 warnings about lack of #address-cells in GPIO nodes Faiz Abbas (2): arm64: dts: ti: k3-j7200: Add gpio nodes arm64: dts: ti: k3-j7200-common-proc-board: Disable unused gpio modules Sekhar Nori (2): arm64: dts: ti: k3: squelch warning about lack of #interrupt-cells arm64: dts: ti: k3: squelch warnings regarding no #address-cells for interrupt-controller arch/arm64/boot/dts/ti/k3-am65-main.dtsi | 6 ++ arch/arm64/boot/dts/ti/k3-am65-wakeup.dtsi | 2 + .../arm64/boot/dts/ti/k3-am654-base-board.dts | 1 + .../dts/ti/k3-j7200-common-proc-board.dts | 16 ++++ arch/arm64/boot/dts/ti/k3-j7200-main.dtsi | 75 +++++++++++++++++++ .../boot/dts/ti/k3-j7200-mcu-wakeup.dtsi | 35 +++++++++ .../dts/ti/k3-j721e-common-proc-board.dts | 1 + arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 12 +++ .../boot/dts/ti/k3-j721e-mcu-wakeup.dtsi | 3 + 9 files changed, 151 insertions(+) -- 2.17.1