From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.6 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 17E5FC2BB40 for ; Sun, 13 Dec 2020 13:55:19 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id DFEE2224BD for ; Sun, 13 Dec 2020 13:55:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2407069AbgLMNzS (ORCPT ); Sun, 13 Dec 2020 08:55:18 -0500 Received: from esa3.hgst.iphmx.com ([216.71.153.141]:35021 "EHLO esa3.hgst.iphmx.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2394767AbgLMNzR (ORCPT ); Sun, 13 Dec 2020 08:55:17 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=wdc.com; i=@wdc.com; q=dns/txt; s=dkim.wdc.com; t=1607867716; x=1639403716; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=0xTfXsu3DDtBbgGH41+1SkWGBKaUBnpGcTeNcSlsTNc=; b=IKmL9LND+EjJdgfgye1qA5SKNP2gC9ePjVgsvSKl0fLnE4uRDAY3/6Ql 2j/5qrHnevb+djCsby3SshzaIpcMCAXW6SHSEC38iU7iGaQkZJ9gagZYM 8IQvua8vAmqELY1CF3Tme2nbbnSMrBC5jIlIlp6+D7gbSy7762yNNVn3O QmJ5YuaA+LK1jHHxKXh+yCnPGJpeZ1Ix+yaMc0UCCgkhtZ7uZLI53nNe8 6oa2Okr9IQkoazLUSOdij9CmThsZKZmfg6bNfLuq1hnE8G/z5WZ3knoYu o+3hOa+1y4z7rouhhUiEWOryq9hpAELWk0Pr2fbhQjZhFhss4W+ffOOho g==; IronPort-SDR: VrZYpYadlSwVVi4Uqxh+RpY2mVXorS6iWTV9mVYMs+6Cd3wK32SvIJOs3VyIZEz6k02NNLt47i jQl3WoPJgv0rS6xEOQPmAiI0H2kZ7Epz/ae4rGIjFHWqbPBsy1XjAt7mUd+3yPMC8ffdP6szcp BMGZ7eABmV0HcwXkhyr+D+D5PTIGfibTQNbcCny8tP/XuEHJitQ1aMLK5SwFfji4n81txVZiB/ tIMIwzMarVlfuauOySkpveHGXjm4ggI2tIvIgDWKTNuYvwYBNqDk68PRtAFpxVozSqELvqrP0/ onE= X-IronPort-AV: E=Sophos;i="5.78,416,1599494400"; d="scan'208";a="159494636" Received: from h199-255-45-15.hgst.com (HELO uls-op-cesaep02.wdc.com) ([199.255.45.15]) by ob1.hgst.iphmx.com with ESMTP; 13 Dec 2020 21:51:37 +0800 IronPort-SDR: N0ux/tri8L75z6YjL8kPKozRg95FGiyQDsAjDDA80HRFE4+zn1djvZzJVLtpG20jn8UNezoe9T wuTtU0DeVOuHHx8Bd0nUz3FKext7EnrAAFV67hBJWhtcJZx37OLzUf7DQq+13ia5BTIkqCEA2J T1SgYntaeF7PHF9arhzLPW6oo8GkILgWW5M7ghr6QV+w6iptKaRJJORKDiWgaTHNpO+tDHNdpM HQKvfX0CeXyLAGtwJg36bEbWnHf5j/pYyXO8ZOdRoJBhisC6ms5qn2SySB2+ixtpP9EdkHFfbr UCOG/QFsO2Qkrk+p0XzvhD+D Received: from uls-op-cesaip01.wdc.com ([10.248.3.36]) by uls-op-cesaep02.wdc.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Dec 2020 05:35:22 -0800 IronPort-SDR: +vwM2VvGrxr6bzNL5Lrs2/00YEQGIZkaWf1RntpVQrBIFHYzmP3EzXGs/n8M+WTXrqKlIw23sV SixN9+VkDhGufrUVgRJq1314aPIrk2ugW5xltGv4Ep0XwNZv8zPJCI0RdexjhG8nCQPUK+Bjyj 0YZ7b75peMpqWF9ZgcP4cPR3KDxxpYarHZzv6KwWVb7//WpMv5CIEQo37Bpw+lvJktS5gmK8v8 9X6YVGBtf1UWe9nNi538EEDq0aHVkH+Easvihh1/ICOMdPou3ftER7vNGo/fOxYOGYvjWso84e M+A= WDCIronportException: Internal Received: from phd004806.ad.shared (HELO twashi.fujisawa.hgst.com) ([10.84.71.197]) by uls-op-cesaip01.wdc.com with ESMTP; 13 Dec 2020 05:51:35 -0800 From: Damien Le Moal To: Palmer Dabbelt , linux-riscv@lists.infradead.org, Rob Herring , devicetree@vger.kernel.org, Stephen Boyd , linux-clk@vger.kernel.org, Linus Walleij , linux-gpio@vger.kernel.org, Philipp Zabel Cc: Sean Anderson Subject: [PATCH v10 18/23] riscv: Add SiPeed MAIX DOCK board device tree Date: Sun, 13 Dec 2020 22:50:51 +0900 Message-Id: <20201213135056.24446-19-damien.lemoal@wdc.com> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20201213135056.24446-1-damien.lemoal@wdc.com> References: <20201213135056.24446-1-damien.lemoal@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add a device tree for the SiPeed MAIX DOCK m1 and m1w boards. This device tree enables LEDs, gpio, i2c and spi/mmc SD card devices. Signed-off-by: Damien Le Moal --- arch/riscv/boot/dts/canaan/k210_maix_dock.dts | 229 ++++++++++++++++++ 1 file changed, 229 insertions(+) create mode 100644 arch/riscv/boot/dts/canaan/k210_maix_dock.dts diff --git a/arch/riscv/boot/dts/canaan/k210_maix_dock.dts b/arch/riscv/boot/dts/canaan/k210_maix_dock.dts new file mode 100644 index 000000000000..abeaa9bad761 --- /dev/null +++ b/arch/riscv/boot/dts/canaan/k210_maix_dock.dts @@ -0,0 +1,229 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2019-20 Sean Anderson + * Copyright (C) 2020 Western Digital Corporation or its affiliates. + */ + +/dts-v1/; + +#include "k210.dtsi" + +#include +#include + +/ { + model = "SiPeed MAIX Dock"; + compatible = "sipeed,maix-dock-m1wm", "sipeed,maix-dock-m1", + "canaan,kendryte-k210"; + + chosen { + bootargs = "earlycon console=ttySIF0"; + stdout-path = "serial0:115200n8"; + }; + + gpio-leds { + compatible = "gpio-leds"; + + /* + * Note: the board specification document green on gpio #4, + * red on gpio #5 and blue on gpio #6. However, the board + * is actually wired differently as defined here. + */ + blue { + gpios = <&gpio1_0 4 GPIO_ACTIVE_LOW>; + }; + + green { + gpios = <&gpio1_0 5 GPIO_ACTIVE_LOW>; + }; + + red { + gpios = <&gpio1_0 6 GPIO_ACTIVE_LOW>; + }; + }; + + gpio-keys { + compatible = "gpio-keys"; + + boot { + label = "BOOT"; + linux,code = ; + gpios = <&gpio0 0 GPIO_ACTIVE_LOW>; + }; + }; + + sound { + compatible = "simple-audio-card"; + simple-audio-card,format = "i2s"; + status = "disabled"; + + simple-audio-card,cpu { + sound-dai = <&i2s0 0>; + }; + + simple-audio-card,codec { + sound-dai = <&mic>; + }; + }; + + mic: mic { + #sound-dai-cells = <0>; + compatible = "memsensing,msm261s4030h0"; + status = "disabled"; + }; +}; + +&fpioa { + pinctrl-0 = <&jtag_pinctrl>; + pinctrl-names = "default"; + status = "okay"; + + jtag_pinctrl: jtag-pinmux { + pinmux = , + , + , + ; + }; + + uarths_pinctrl: uarths-pinmux { + pinmux = , + ; + }; + + gpio_pinctrl: gpio-pinmux { + pinmux = , + , + , + , + , + ; + }; + + gpiohs_pinctrl: gpiohs-pinmux { + pinmux = , + , + , + , + , + , + , + , + , + , + ; + }; + + i2s0_pinctrl: i2s0-pinmux { + pinmux = , + , + ; + }; + + dvp_pinctrl: dvp-pinmux { + pinmux = , + , + , + , + , + , + , + ; + }; + + spi0_pinctrl: spi0-pinmux { + pinmux = , /* cs */ + , /* rst */ + , /* dc */ + ; /* wr */ + }; + + spi1_pinctrl: spi1-pinmux { + pinmux = , + , + , + ; /* cs */ + }; + + i2c1_pinctrl: i2c1-pinmux { + pinmux = , + ; + }; +}; + +&uarths0 { + pinctrl-0 = <&uarths_pinctrl>; + pinctrl-names = "default"; + status = "okay"; +}; + +&gpio0 { + pinctrl-0 = <&gpiohs_pinctrl>; + pinctrl-names = "default"; + status = "okay"; +}; + +&gpio1 { + pinctrl-0 = <&gpio_pinctrl>; + pinctrl-names = "default"; + status = "okay"; +}; + +&i2s0 { + #sound-dai-cells = <1>; + pinctrl-0 = <&i2s0_pinctrl>; + pinctrl-names = "default"; +}; + +&i2c1 { + pinctrl-0 = <&i2c1_pinctrl>; + pinctrl-names = "default"; + clock-frequency = <400000>; + status = "okay"; +}; + +&dvp0 { + pinctrl-0 = <&dvp_pinctrl>; + pinctrl-names = "default"; +}; + +&spi0 { + pinctrl-0 = <&spi0_pinctrl>; + pinctrl-names = "default"; + num-cs = <1>; + cs-gpios = <&gpio0 20 GPIO_ACTIVE_HIGH>; + + panel@0 { + compatible = "sitronix,st7789v"; + reg = <0>; + reset-gpios = <&gpio0 21 GPIO_ACTIVE_LOW>; + dc-gpios = <&gpio0 22 0>; + spi-max-frequency = <15000000>; + status = "disabled"; + }; +}; + +&spi1 { + pinctrl-0 = <&spi1_pinctrl>; + pinctrl-names = "default"; + num-cs = <1>; + cs-gpios = <&gpio0 13 GPIO_ACTIVE_LOW>; + status = "okay"; + + slot@0 { + compatible = "mmc-spi-slot"; + reg = <0>; + voltage-ranges = <3300 3300>; + spi-max-frequency = <25000000>; + broken-cd; + }; +}; + +&spi3 { + spi-flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <50000000>; + m25p,fast-read; + broken-flash-reset; + }; +}; -- 2.29.2