From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2D0C5C433DB for ; Thu, 31 Dec 2020 07:28:16 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id D7F212075E for ; Thu, 31 Dec 2020 07:28:15 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726218AbgLaH2A (ORCPT ); Thu, 31 Dec 2020 02:28:00 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39848 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726139AbgLaH17 (ORCPT ); Thu, 31 Dec 2020 02:27:59 -0500 Received: from mail-pg1-x536.google.com (mail-pg1-x536.google.com [IPv6:2607:f8b0:4864:20::536]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8AF39C061575 for ; Wed, 30 Dec 2020 23:27:19 -0800 (PST) Received: by mail-pg1-x536.google.com with SMTP id i5so12707755pgo.1 for ; Wed, 30 Dec 2020 23:27:19 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to; bh=L3rchCgn60UXSNg/RkUXBGhv13ATR5wc8YM8fhcBkn4=; b=x4261brrKoUTmGEcVb8b6y4YuUMUAwI/WAJ6I3alcPunXupX7CbORvMgruLH8gs0G9 GwtAdwg8P7p1mHxUw/4OjxCjrbB2Z6g0cRSNkwaHoeZLFAUmcIha8qokVnKxlGudDett NukWnXz3y8QOnK6oc4/j3OYiFTlktdT5Mt0cPNhPrgfxMQCi/6+N2kH9KDUFXU6XgX+s aYxuDapL2VXTwKbOY7j2bfYQsKO5xJ8fMXkC9iDdf2Wn2K+WiHAVzpNHAKfRvcILbixJ FxRUmWQgSOwAu5wVXBSHsjxxccz/qZU19+Esh9YYtfzQcMjhtI3eq5yp0tHQWs3XXBZ0 F4ow== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to; bh=L3rchCgn60UXSNg/RkUXBGhv13ATR5wc8YM8fhcBkn4=; b=hOysP31IL4zytVSGy8gSHPhzMjj7Po1VOYore7O369DXME4mL55+EHUkYRRLReXjMX LD81HCo5aNy2jPj5/+osFrE0tkOGk/wdulSAanMMdDmdrhnhPEhdSHlFc6r8k81YsGvG vFSUyNMU+smuZIcKxzqE+Y+cG+dOnl86wvOZ9/QZ5vPYmrXgGF/5swH0CV3wnX3PzJgP UYKiAv63OeUlrxH5eRyHyyBX2knyCyILxAbNdOOY1lAczXEI28Hi3uVTJUJWq5sHzG/e LZvGcVvKkh+YAbrzntrCx8bXdxp55Evg8iEv4fZ/sZR1qL2Zzx6eYuolUEH6Q54AFbV7 j0DA== X-Gm-Message-State: AOAM530wA2hSd9cEstxor6G7m61Ntdm7Dlx0YwIzfrmQLF4Jzbw1O1RT e6zvtKhmofUvVzdRsJ6nm002 X-Google-Smtp-Source: ABdhPJyjSzd1B+plpmbHvjXcunIxJaD12PEru1NpFPYDBdpPKuhm2hQA1BpegeJ7YX2dsMxLKgqq+w== X-Received: by 2002:a63:4559:: with SMTP id u25mr26577840pgk.306.1609399639035; Wed, 30 Dec 2020 23:27:19 -0800 (PST) Received: from thinkpad ([2409:4072:6d1f:be3b:71a9:d2bf:a32d:897d]) by smtp.gmail.com with ESMTPSA id j14sm9532596pjm.10.2020.12.30.23.27.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 30 Dec 2020 23:27:18 -0800 (PST) Date: Thu, 31 Dec 2020 12:57:10 +0530 From: Manivannan Sadhasivam To: Cristian Ciocaltea Cc: Rob Herring , Andreas =?iso-8859-1?Q?F=E4rber?= , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-actions@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v3 11/13] arm: dts: owl-s500-roseapplepi: Add uSD support Message-ID: <20201231072710.GF7345@thinkpad> References: <47ee9695e89198ec2fbc4ab6188f1d0ad0424b2f.1609263738.git.cristian.ciocaltea@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <47ee9695e89198ec2fbc4ab6188f1d0ad0424b2f.1609263738.git.cristian.ciocaltea@gmail.com> Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On Tue, Dec 29, 2020 at 11:17:26PM +0200, Cristian Ciocaltea wrote: > Add uSD support for RoseapplePi SBC using a fixed regulator as a > temporary solution until PMIC support becomes available. > > Signed-off-by: Cristian Ciocaltea Reviewed-by: Manivannan Sadhasivam Thanks, Mani > --- > Changes in v3: > - None > > arch/arm/boot/dts/owl-s500-roseapplepi.dts | 50 ++++++++++++++++++++++ > 1 file changed, 50 insertions(+) > > diff --git a/arch/arm/boot/dts/owl-s500-roseapplepi.dts b/arch/arm/boot/dts/owl-s500-roseapplepi.dts > index 800edf5d2d12..fe9ae3619422 100644 > --- a/arch/arm/boot/dts/owl-s500-roseapplepi.dts > +++ b/arch/arm/boot/dts/owl-s500-roseapplepi.dts > @@ -14,6 +14,7 @@ / { > model = "Roseapple Pi"; > > aliases { > + mmc0 = &mmc0; > serial2 = &uart2; > }; > > @@ -25,6 +26,55 @@ memory@0 { > device_type = "memory"; > reg = <0x0 0x80000000>; /* 2GB */ > }; > + > + /* Fixed regulator used in the absence of PMIC */ > + sd_vcc: sd-vcc { > + compatible = "regulator-fixed"; > + regulator-name = "fixed-3.1V"; > + regulator-min-microvolt = <3100000>; > + regulator-max-microvolt = <3100000>; > + regulator-always-on; > + }; > +}; > + > +&pinctrl { > + mmc0_pins: mmc0-pins { > + pinmux { > + groups = "sd0_d0_mfp", "sd0_d1_mfp", "sd0_d2_d3_mfp", > + "sd0_cmd_mfp", "sd0_clk_mfp"; > + function = "sd0"; > + }; > + > + drv-pinconf { > + groups = "sd0_d0_d3_drv", "sd0_cmd_drv", "sd0_clk_drv"; > + drive-strength = <8>; > + }; > + > + bias0-pinconf { > + pins = "sd0_d0", "sd0_d1", "sd0_d2", > + "sd0_d3", "sd0_cmd"; > + bias-pull-up; > + }; > + > + bias1-pinconf { > + pins = "sd0_clk"; > + bias-pull-down; > + }; > + }; > +}; > + > +/* uSD */ > +&mmc0 { > + status = "okay"; > + pinctrl-names = "default"; > + pinctrl-0 = <&mmc0_pins>; > + no-sdio; > + no-mmc; > + no-1-8-v; > + cd-gpios = <&pinctrl 117 GPIO_ACTIVE_LOW>; > + bus-width = <4>; > + vmmc-supply = <&sd_vcc>; > + vqmmc-supply = <&sd_vcc>; > }; > > &twd_timer { > -- > 2.30.0 >