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From: Rob Herring <robh@kernel.org>
To: "Chia-Wei, Wang" <chiawei_wang@aspeedtech.com>
Cc: joel@jms.id.au, andrew@aj.id.au, tglx@linutronix.de,
	maz@kernel.org, p.zabel@pengutronix.de,
	linux-aspeed@lists.ozlabs.org, openbmc@lists.ozlabs.org,
	devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, BMC-SW@aspeedtech.com
Subject: Re: [PATCH 5/6] soc: aspeed: Add eSPI driver
Date: Wed, 6 Jan 2021 08:32:02 -0700	[thread overview]
Message-ID: <20210106153202.GA2258036@robh.at.kernel.org> (raw)
In-Reply-To: <20210106055939.19386-6-chiawei_wang@aspeedtech.com>

On Wed, Jan 06, 2021 at 01:59:38PM +0800, Chia-Wei, Wang wrote:
> The Aspeed eSPI controller is slave device to communicate with
> the master through the Enhanced Serial Peripheral Interface (eSPI).
> All of the four eSPI channels, namely peripheral, virtual wire,
> out-of-band, and flash are supported.
> 
> Signed-off-by: Chia-Wei, Wang <chiawei_wang@aspeedtech.com>
> ---
>  drivers/soc/aspeed/Kconfig                  |  49 ++
>  drivers/soc/aspeed/Makefile                 |   5 +
>  drivers/soc/aspeed/aspeed-espi-ctrl.c       | 197 ++++++
>  drivers/soc/aspeed/aspeed-espi-flash.c      | 490 ++++++++++++++
>  drivers/soc/aspeed/aspeed-espi-oob.c        | 706 ++++++++++++++++++++
>  drivers/soc/aspeed/aspeed-espi-peripheral.c | 613 +++++++++++++++++
>  drivers/soc/aspeed/aspeed-espi-vw.c         | 211 ++++++
>  include/uapi/linux/aspeed-espi.h            | 160 +++++
>  8 files changed, 2431 insertions(+)
>  create mode 100644 drivers/soc/aspeed/aspeed-espi-ctrl.c
>  create mode 100644 drivers/soc/aspeed/aspeed-espi-flash.c
>  create mode 100644 drivers/soc/aspeed/aspeed-espi-oob.c
>  create mode 100644 drivers/soc/aspeed/aspeed-espi-peripheral.c
>  create mode 100644 drivers/soc/aspeed/aspeed-espi-vw.c

drivers/spi/ is the correct location for a SPI controller.

>  create mode 100644 include/uapi/linux/aspeed-espi.h

This userspace interface is not going to be accepted upstream.

I'd suggest you look at similar SPI flash capable SPI controller drivers 
upstream and model your driver after them. This looks like it needs 
major reworking.

Rob

  parent reply	other threads:[~2021-01-06 15:32 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-01-06  5:59 [PATCH 0/6] arm: aspeed: Add eSPI support Chia-Wei, Wang
2021-01-06  5:59 ` [PATCH 1/6] dt-bindings: aspeed: Add eSPI controller Chia-Wei, Wang
2021-01-06 15:07   ` Rob Herring
2021-01-07  2:31     ` ChiaWei Wang
2021-01-06  5:59 ` [PATCH 2/6] MAINTAINER: Add ASPEED eSPI driver entry Chia-Wei, Wang
2021-01-06  5:59 ` [PATCH 3/6] clk: ast2600: Add eSPI reset bit Chia-Wei, Wang
2021-01-06  5:59 ` [PATCH 4/6] irqchip/aspeed: Add Aspeed eSPI interrupt controller Chia-Wei, Wang
2021-01-06 10:59   ` Marc Zyngier
2021-01-07  2:59     ` ChiaWei Wang
2021-01-07 10:17       ` Marc Zyngier
2021-01-08  2:33         ` ChiaWei Wang
2021-01-06  5:59 ` [PATCH 5/6] soc: aspeed: Add eSPI driver Chia-Wei, Wang
2021-01-06  7:51   ` kernel test robot
2021-01-06 15:32   ` Rob Herring [this message]
2021-01-07  2:35     ` ChiaWei Wang
2021-01-08  2:59       ` Joel Stanley
2021-01-08  3:09         ` Ryan Chen
2021-01-06  5:59 ` [PATCH 6/6] ARM: dts: aspeed: Add AST2600 eSPI nodes Chia-Wei, Wang

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