From: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
To: linux-arm-msm@vger.kernel.org
Cc: konrad.dybcio@somainline.org, marijn.suijten@somainline.org,
martin.botka@somainline.org, phone-devel@vger.kernel.org,
linux-kernel@vger.kernel.org, robh+dt@kernel.org,
rjw@rjwysocki.net, viresh.kumar@linaro.org, nks@flawful.org,
agross@kernel.org, bjorn.andersson@linaro.org,
daniel.lezcano@linaro.org, manivannan.sadhasivam@linaro.org,
devicetree@vger.kernel.org, linux-pm@vger.kernel.org,
AngeloGioacchino Del Regno
<angelogioacchino.delregno@somainline.org>
Subject: [PATCH v2 15/15] dt-bindings: cpufreq: qcom-hw: Add bindings for 8998
Date: Sat, 9 Jan 2021 19:03:59 +0100 [thread overview]
Message-ID: <20210109180359.236098-16-angelogioacchino.delregno@somainline.org> (raw)
In-Reply-To: <20210109180359.236098-1-angelogioacchino.delregno@somainline.org>
The OSM programming addition has been done under the
qcom,cpufreq-hw-8998 compatible name: specify the requirement
of two additional register spaces for this functionality.
This implementation, with the same compatible, has been
tested on MSM8998 and SDM630.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
---
.../bindings/cpufreq/cpufreq-qcom-hw.yaml | 44 ++++++++++++++++---
1 file changed, 39 insertions(+), 5 deletions(-)
diff --git a/Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yaml b/Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yaml
index bc81b6203e27..0bf539954558 100644
--- a/Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yaml
+++ b/Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yaml
@@ -18,6 +18,10 @@ description: |
properties:
compatible:
oneOf:
+ - description: Non-secure v1 of CPUFREQ HW
+ items:
+ - const: qcom,cpufreq-hw-8998
+
- description: v1 of CPUFREQ HW
items:
- const: qcom,cpufreq-hw
@@ -30,19 +34,27 @@ properties:
reg:
minItems: 2
- maxItems: 3
+ maxItems: 7
items:
- description: Frequency domain 0 register region
- description: Frequency domain 1 register region
- description: Frequency domain 2 register region
+ - description: PLL ACD domain 0 register region
+ - description: PLL ACD domain 1 register region
+ - description: Operating State Manager domain 0 register region
+ - description: Operating State Manager domain 1 register region
reg-names:
minItems: 2
- maxItems: 3
+ maxItems: 7
items:
- - const: freq-domain0
- - const: freq-domain1
- - const: freq-domain2
+ - const: "freq-domain0"
+ - const: "freq-domain1"
+ - const: "freq-domain2"
+ - const: "osm-acd0"
+ - const: "osm-acd1"
+ - const: "osm-domain0"
+ - const: "osm-domain1"
clocks:
items:
@@ -57,6 +69,28 @@ properties:
'#freq-domain-cells':
const: 1
+allOf:
+ - if:
+ properties:
+ reg-names:
+ contains:
+ const: qcom,cpufreq-hw-8998
+ then:
+ properties:
+ reg:
+ minItems: 4
+ maxItems: 6
+ reg-names:
+ items:
+ minItems: 4
+ else:
+ properties:
+ reg:
+ maxItems: 3
+ reg-names:
+ items:
+ maxItems: 3
+
required:
- compatible
- reg
--
2.29.2
next prev parent reply other threads:[~2021-01-09 18:06 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-01-09 18:03 [PATCH v2 00/15] Enable CPRh/3/4, CPU Scaling on various QCOM SoCs AngeloGioacchino Del Regno
2021-01-09 18:03 ` [PATCH v2 01/15] cpuidle: qcom_spm: Detach state machine from main SPM handling AngeloGioacchino Del Regno
2021-01-09 18:03 ` [PATCH v2 02/15] soc: qcom: spm: Implement support for SAWv4.1, SDM630/660 L2 AVS AngeloGioacchino Del Regno
2021-01-09 18:03 ` [PATCH v2 03/15] soc: qcom: spm: Add compatible for MSM8998 SAWv4.1 L2 AngeloGioacchino Del Regno
2021-01-09 18:03 ` [PATCH v2 04/15] cpufreq: blacklist SDM630/636/660 in cpufreq-dt-platdev AngeloGioacchino Del Regno
2021-01-09 18:03 ` [PATCH v2 05/15] cpufreq: blacklist MSM8998 " AngeloGioacchino Del Regno
2021-01-09 18:03 ` [PATCH v2 06/15] soc: qcom: cpr: Move common functions to new file AngeloGioacchino Del Regno
2021-01-09 18:03 ` [PATCH v2 07/15] arm64: qcom: qcs404: Change CPR nvmem-names AngeloGioacchino Del Regno
2021-01-09 18:03 ` [PATCH v2 08/15] dt-bindings: avs: cpr: Convert binding to YAML schema AngeloGioacchino Del Regno
2021-01-10 17:18 ` Rob Herring
2021-01-09 18:03 ` [PATCH v2 09/15] soc: qcom: Add support for Core Power Reduction v3, v4 and Hardened AngeloGioacchino Del Regno
2021-01-09 18:03 ` [PATCH v2 10/15] MAINTAINERS: Add entry for Qualcomm CPRv3/v4/Hardened driver AngeloGioacchino Del Regno
2021-01-09 18:03 ` [PATCH v2 11/15] dt-bindings: soc: qcom: cpr3: Add bindings for CPR3 driver AngeloGioacchino Del Regno
2021-01-09 18:03 ` [PATCH v2 12/15] dt-bindings: arm: cpus: Document 'qcom,freq-domain' property AngeloGioacchino Del Regno
2021-01-09 18:03 ` [PATCH v2 13/15] dt-bindings: cpufreq: cpufreq-qcom-hw: Convert to YAML bindings AngeloGioacchino Del Regno
2021-01-09 18:03 ` [PATCH v2 14/15] cpufreq: qcom-hw: Implement CPRh aware OSM programming AngeloGioacchino Del Regno
2021-01-09 18:03 ` AngeloGioacchino Del Regno [this message]
2021-01-10 17:18 ` [PATCH v2 15/15] dt-bindings: cpufreq: qcom-hw: Add bindings for 8998 Rob Herring
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